15 Revision History
Changes from September 8, 2023 to November 10, 2025 (from Revision B (September 2023) to Revision C (November 2025))
- Add table showing CBASS err_regs RegistersGo
- Add table of CBASS Registers for glb_regs region.Go
- Add Temperature Sensor locations.Go
- Remove
UART from PRUSS
unsupported features.Go
- Add 1T command timing to unsupported featuresGo
- Replace 'baud rates above 3.6864Mbaud' with '12Mbps not supported for MCU
and WKUP domains'Go
- Update
RTC Unsupported FeaturesGo
- Add
"two digital voltage domains"Go
- Only 25MHz PLL Reference Clock is supported.Go
- Update UART Primary Boot Mode B7 to 0.Go
- Update UART Backup Boot Mode B13 to 0.Go
- Add xSPI Flow Chart and ROM SFDP Parser Flow Chart.Go
- Add information about errata affecting operation
frequency.Go
- Rename RMII1_REF_CLK to RMII REF_CLK.Go
- Make the following updates to the POK Module Overview Table:
IPOK_VMON_CAP_MCU_GENERAL --> IPOK_VDDS_CAP_MCU, IPOK_VDDSHV_MAIN_1P8 -->
IPOK_VDDS_MCU_1P8, IPOK_VDDSHV_MAIN_3P3 → IPOK_VDDSHV_MCU_3P3, VMON_VSYS →
VMON_ER_VSYSGo
- Update register names.Go
- Remove 1.8 V from Voltage Monitored (VDDA_MCU) so it
isn't confused as part of the signal name.Go
- AVS Class-0 not supported. Removed from list of
features.Go
- Remove note that says VTM functions are controlled though DMSC.Go
- Update register names.Go
- Update register names.Go
- Update register names.Go
- Update register names.Go
- Update register names.Go
- Update register names.Go
- Update register names.Go
- Update register
names.Go
- Add additional details about VTM hardware alert signal.Go
- Update register names.Go
- Update
MCU_CTRL_MMR_CFG0_MCU_PLL_CLKSEL Register
name.Go
- Update register nameGo
- Update figure so that FOUTPOSTDIV is routed to HSDIV[5-9] and FOUTP
is routed to HSDIV[0-4]Go
- Update register
names.Go
- [PRU-ICSS Key Features] Updated from 8 to 10 Host
InterruptsGo
- [PRU-ICSS Key Features] Updated from 8 to 2
interrupt signals exported to ARM.Go
- [PRU-ICSS Key Features] Changed program memory per
PRU size from 16KB to 12KBGo
- [PRU-ICSS I/O Signals] changed first column in table to be PR<k> instead
of PR0 to represent multiple instances of PRU-ICSS (if applicable)Go
- [PRU-ICSS Top Level Resources Functional Description] Added details
for devices with >1 ICSS instance.Go
- [PRU-ICSS Local Instruction Memory Map] Updated IMEM/IRAM size to
12KB from 16KB.Go
- [PRU-ICSS Interrupt Requests Mapping] Updated IP Interrupts Table to
match IP Spec. Interrupts [63:32] can be generated from internal or external
sources.Go
- Remove wording that
shows 2 PRUSS.Go
- [PRU-ICSS UART Signal Descriptions] References to PRUSS updated to
PRU-ICSS.Go
- [PRU-ICSS eCAP Features] References to PRUSS updated to
PRU-ICSS.Go
- Update register names from DDRSS_* to EMIF_SSCFG_*Go
- Update register names from DDRSS_* to EMIF_SSCFG_*Go
- Update register names from DDRSS_*
to EMIF_SSCFG_*Go
- Update register names from DDRSS_*
to EMIF_SSCFG_*Go
- Update register names from DDRSS_*
to EMIF_SSCFG_*Go
- Update register names from DDRSS_*
to EMIF_SSCFG_*Go
- Update register names from DDRSS_*
to EMIF_SSCFG_*Go
- Added New Section Region-based Address Translation (RAT) ModuleGo
- Update Interrupt connection between MAILBOX and ICSSM to
N.Go
- Update
Table to match descriptions.Go
- Create note to see Module Integration section about which GPIO pins
are supported.Go
- I2C: Genericize I2C Module imageGo
- I2C: Updated note under I2C Block Diagram to clarify the i variablesGo
- I2C: Updated note in I2C Clocking to clarify the i variablesGo
- I2C: Updated subsection reference to parent of the subsection Go
- Registers names updated within SPI chapter.Go
- MCSPI: MCSPI Interface Signals in Controller Mode updated to a more generic imageGo
- MCSPI: Update MCSPI Channels to show as CH(i) instead of CHi.Go
- SPI: Basic MCSPI Pins for Peripheral Mode table and diagrams updated to be nire generic Go
- Add addition information to Polarity and Phase regarding data
transfer.Go
- SPI: Update Global Initialization of Surrounding Modues to mention not all modules are applicable Go
- Added RX, TX, CTS and RTS signals to main domain. Go
- UART: changed description in System Using RS-485 Communication to better align with UART instance used in section's imageGo
- UART: Changed IrDA Mode Interface Signals image and paragraph to be more genericGo
- UART: Made CIR Mode Interface Signals diagram and paragraph more genericGo
- Updated the UART Baud Rate Settings table for baud rate up to
12Mbps.Go
- Update DLL and DLH Hex values associated with 160MHz and 192MHz
Source Clock.Go
- Register name updates within CPSW3G
Chapter.Go
- Rename RMII1_REF_CLK to RMII_REF_CLK.Go
- CPSW: Update interface mode registers to more generic name. Go
- CPSW: Updated RMII clocking register to more generic nameGo
- CPSW: Updated CPSW CPTS CLKSEL to generic bit nameGo
- CPSW: Change to generic CPTS_CLKSEL nameGo
- CPSW: updated to generic names for ENET1_CTRL and ENET2_CTRLGo
- Update register names in OSPI Chapter.Go
- Remove misleading statement: Supports dual Quad-SPI mode for fast
boot applications.Go
- Update register names (GPMC_BCH_RESULT_*)Go
- Update register names in ELM Chapter.Go
- Fixed typo of SDIO version from 4.0 to 3.0.Go
- MMCSD IO Multiplexer figure added.Go
- EPW: Updated instance counts and register names for Time-Base ClocksGo
- Update register names in GTC Chapter.Go
- GTC: Updated CLKSEL register name Go
- Update register names in chapter.Go
- Change 32768 MHz to 32768Hz.Go
- Change 32768 MHz to 32768Hz.Go
- Update register names in chapter.Go
- Timers: Updated paragraph to clarify instance counts. Updated register reference to register name instead of register regionGo
- Register names updated within Chapter.Go
- DCC: Update note and image to be genericGo
- Added ECC Error Injection Sequence section.Go
- Add ECC Aggregator Registers.Go
-
Figure 12-485 OLDI Type C A30 updated from B6 to R6.Go
- Change bit name DSS_IDLE_STATUS to DISPC_IDLE_STATUS.Go
- Changed DSS_VP1_POL_FREQ IPC/RF Note to be same instead of
opposite.Go
- Added Peripheral Suspend to Debug ChapterGo
- Update DRV_STR Values.Go
- Mark ISO_OVR as Reserved.Go
- Add Drive Strength Control options.Go