SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
| Bits | Field | Reset | Description |
|---|---|---|---|
| 31 | enable | 0x0 | When set, the channel is enabled. When cleared, the TX channel is disabled. When disabled, the channel discards all ingress data. A one to zero transition on this bit fully resets the channel. |
| 30:0 | - | 0x0 | Reserved. |