SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
| Instance | MAIN | MCU | WKUP |
|---|---|---|---|
| I2C0 | ✓ | ||
| I2C1 | ✓ | ||
| I2C2 | ✓ | ||
| I2C3 | ✓ | ||
| MCU_I2C0 | ✓ | ||
| WKUP_I2C0 | ✓ |
| Module Instance | Power Sleep Controller | Power Domain | Module Domain | Index | Default | Controllable | Dependencies |
|---|---|---|---|---|---|---|---|
| I2C0 | PSC0 | GP_Core_CTL | LPSC_main_IP | 34 | ON | YES | LPSC_DM2main_infra_ISO |
| I2C1 | PSC0 | GP_Core_CTL | LPSC_main_IP | 34 | ON | YES | LPSC_DM2main_infra_ISO |
| I2C2 | PSC0 | GP_Core_CTL | LPSC_main_IP | 34 | ON | YES | LPSC_DM2main_infra_ISO |
| I2C3 | PSC0 | GP_Core_CTL | LPSC_main_IP | 34 | ON | YES | LPSC_DM2main_infra_ISO |
| MCU_I2C0 | WKUP_PSC0 | PD_M4F | LPSC_MCU_common | 9 | ON | YES | LPSC_DM2safe_ISO |
| WKUP_I2C0 | PSC0 | GP_Core_CTL | LPSC_main_alwayson | 0 | ON | NO |
| Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
|---|---|---|---|---|
| I2C0 | ICLK | MAIN_SYSCLK0/4 | interface clock | |
| I2C0 | FCLK | MAIN_PLL1_HSDIV0_CLKOUT/2 | functional clock | |
| I2C1 | ICLK | MAIN_SYSCLK0/4 | interface clock | |
| I2C1 | FCLK | MAIN_PLL1_HSDIV0_CLKOUT/2 | functional clock | |
| I2C2 | ICLK | MAIN_SYSCLK0/4 | interface clock | |
| I2C2 | FCLK | MAIN_PLL1_HSDIV0_CLKOUT/2 | functional clock | |
| I2C3 | ICLK | MAIN_SYSCLK0/4 | interface clock | |
| I2C3 | FCLK | MAIN_PLL1_HSDIV0_CLKOUT/2 | functional clock | |
| MCU_I2C0 | ICLK | MCU_SYSCLK0/4 | interface clock | |
| MCU_I2C0 | FCLK | MCU_PLL0_HSDIV1_CLKOUT | functional clock | |
| WKUP_I2C0 | ICLK | DM_CLK/4 | interface clock | |
| WKUP_I2C0 | FCLK | MCU_PLL0_HSDIV1_CLKOUT | functional clock |
| Module Instance | Source | Description |
|---|---|---|
| I2C0 | PSC0 | I2C0 reset |
| I2C1 | PSC0 | I2C1 reset |
| I2C2 | PSC0 | I2C2 reset |
| I2C3 | PSC0 | I2C3 reset |
| MCU_I2C0 | WKUP_PSC0 | MCU_I2C0 reset |
| WKUP_I2C0 | PSC0 | WKUP_I2C0 reset |
| Module Instance | Module Interrupt Signal | Destination Interrupt Input | Destination | Description | Type |
|---|---|---|---|---|---|
| I2C0 | I2C0_pointrpend_0 | GICSS0_spi_193 | GICSS0 | I2C0 interrupt request | level |
| I2C0 | I2C0_pointrpend_0 | ICSSM0_pr1_slv_intr_9 | ICSSM0 | I2C0 interrupt request | level |
| I2C0 | I2C0_pointrpend_0 | WKUP_R5FSS0_CORE0_intr_193 | WKUP_R5FSS0_CORE0 | I2C0 interrupt request | level |
| I2C1 | I2C1_pointrpend_0 | GICSS0_spi_194 | GICSS0 | I2C1 interrupt request | level |
| I2C1 | I2C1_pointrpend_0 | WKUP_R5FSS0_CORE0_intr_194 | WKUP_R5FSS0_CORE0 | I2C1 interrupt request | level |
| I2C2 | I2C2_pointrpend_0 | GICSS0_spi_195 | GICSS0 | I2C2 interrupt request | level |
| I2C2 | I2C2_pointrpend_0 | WKUP_R5FSS0_CORE0_intr_195 | WKUP_R5FSS0_CORE0 | I2C2 interrupt request | level |
| I2C3 | I2C3_pointrpend_0 | GICSS0_spi_196 | GICSS0 | I2C3 interrupt request | level |
| I2C3 | I2C3_pointrpend_0 | WKUP_R5FSS0_CORE0_intr_196 | WKUP_R5FSS0_CORE0 | I2C3 interrupt request | level |
| MCU_I2C0 | MCU_I2C0_pointrpend_0 | MCU_M4FSS0_CORE0_nvic_17 | MCU_M4FSS0_CORE0 | MCU_I2C0 interrupt request | level |
| MCU_I2C0 | MCU_I2C0_pointrpend_0 | GICSS0_spi_139 | GICSS0 | MCU_I2C0 interrupt request | level |
| MCU_I2C0 | MCU_I2C0_pointrpend_0 | WKUP_R5FSS0_CORE0_intr_197 | WKUP_R5FSS0_CORE0 | MCU_I2C0 interrupt request | level |
| WKUP_I2C0 | WKUP_I2C0_clkstop_wakeup_0 | WKUP_R5FSS0_CORE0_intr_143 | WKUP_R5FSS0_CORE0 | WKUP_I2C0 interrupt request | level |
| WKUP_I2C0 | WKUP_I2C0_clkstop_wakeup_0 | WKUP_DEEPSLEEP_SOURCES0_Isam62_dm_wakeup_deepsleep_sources_0 | WKUP_DEEPSLEEP_SOURCES0 | WKUP_I2C0 interrupt request | level |
| WKUP_I2C0 | WKUP_I2C0_pointrpend_0 | GICSS0_spi_197 | GICSS0 | WKUP_I2C0 interrupt request | level |
| WKUP_I2C0 | WKUP_I2C0_pointrpend_0 | WKUP_R5FSS0_CORE0_intr_190 | WKUP_R5FSS0_CORE0 | WKUP_I2C0 interrupt request | level |