SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
Table 9-4 shows all memory regions associated with the DDRSS0.
| Region | Start Address | End Address | Region Size |
|---|---|---|---|
| DDRSS0 wrapper logic registers | 0x00F300000 | 0x00F3001FF | 512 B |
| DDR controller registers | 0x00F308000 | 0x00F309FFF | 8 KB |
| DDR PHY independent module registers | 0x00F30A000 | 0x00F30BFFF | 8 KB |
| DDR PHY registers | 0x00F30C000 | 0x00F30FFFF | 16 KB |
| External SDRAM data space | 0x080000000 | 0x0FFFFFFFF | 2 GB |
| 0x880000000 | 0x9FFFFFFFF | 6 GB | |