SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
When the processor RESET pin is asserted, the entire processor is reset and is held in the reset state until the RESET pin is released. As part of a device reset, the PRUSS UART0 state machine is reset and the PRUSS UART0 registers are forced to their default states. The default states of the registers are shown in .