SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
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| Instance Name | Physical Address |
|---|---|
| MCU_CTRL_MMR0 | 0451 A208h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | PRG_PP_1_CTRL_POK_PP_EN_PROXY | RESERVED | PRG_PP_1_CTRL_DEGLITCH_SEL_PROXY | ||||
| NONE | R/W | NONE | R/W | ||||
| 0h | 0h | 0h | 2h | ||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| PRG_PP_1_CTRL_POK_EN_SEL_PROXY | PRG_PP_1_CTRL_POK_VDDS_DDRIO_OV_SEL_PROXY | PRG_PP_1_CTRL_POK_VDDSHV_MAIN_3P3_OV_SEL_PROXY | PRG_PP_1_CTRL_POK_VDDSHV_MAIN_1P8_OV_SEL_PROXY | PRG_PP_1_CTRL_POK_VMON_CAP_MCU_GENERAL_OV_SEL_PROXY | RSVD | RSVD | PRG_PP_1_CTRL_POK_VDDR_CORE_OV_SEL_PROXY |
| R/W | R/W | R/W | R/W | R/W | R/W | ||
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | PRG_PP_1_CTRL_POK_VDDS_DDRIO_EN_PROXY | PRG_PP_1_CTRL_POK_VDDSHV_MAIN_3P3_EN_PROXY | PRG_PP_1_CTRL_POK_VDDSHV_MAIN_1P8_EN_PROXY | PRG_PP_1_CTRL_POK_VMON_CAP_MCU_GENERAL_EN_PROXY | RSVD | RSVD | PRG_PP_1_CTRL_POK_VDDR_CORE_EN_PROXY |
| NONE | R/W | R/W | R/W | R/W | R/W | ||
| 0h | 1h | 1h | 1h | 1h | 1h | 1h | 1h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:20 | RESERVED | NONE | 0h | Reserved |
| 19 | PRG_PP_1_CTRL_POK_PP_EN_PROXY | R/W | 0h | POK ping-pong activate. When set, activatesautomatic switching between undervoltage andovervoltage detection on PRG_PP1 (POK_VDDR_CORE, POK_VDDSHV_MCU_1P8, POK_VDDSHV_MCU_3P3, POK_VMON_CAP_MCU_GENERAL, POK_VDDSHV_MAIN_1P8, POK_VDDSHV_MAIN_3P3, and POK_VDDS_DDRIO) POKs. This bit has no effect if the POK's ov_sel bit = 1. 0 - No pingpong operation. UV/OV operationselected by each POK ov_sel bit 1 - Pingpong operation activated . Reset Source: mod_por_rst_n |
| 18 | RESERVED | NONE | 0h | Reserved |
| 17:16 | PRG_PP_1_CTRL_DEGLITCH_SEL_PROXY | R/W | 2h | Deglitch period for PRG_PP1 POKs: 2'b00 - 5 us 2'b01 -10 us 2'b10 - 15 us 2'b11 - 20us Reset Source: mod_por_rst_n |
| 15 | PRG_PP_1_CTRL_POK_EN_SEL_PROXY | R/W | 0h | Select POK activate source 0 - POK activates come from hardware tie-offs 1 - POK activates come from PRG_PP1_CTRL register Reset Source: mod_por_rst_n |
| 14 | PRG_PP_1_CTRL_POK_VDDS_DDRIO_OV_SEL_PROXY | R/W | 0h | POK_VDDS_DDRIO mode: 0 = Undervoltage (pok_pp_en = 0) Ping-Pong (pok_pp_en = 1) 1 = Overvoltage (pok_pp_en = x) Reset Source: mod_por_rst_n |
| 13 | PRG_PP_1_CTRL_POK_VDDSHV_MAIN_3P3_OV_SEL_PROXY | R/W | 0h | POK_VDDSHV_MAIN_3P3 mode: 0 = Undervoltage (pok_pp_en = 0) Ping-Pong (pok_pp_en = 1) 1 = Overvoltage (pok_pp_en = x) Reset Source: mod_por_rst_n |
| 12 | PRG_PP_1_CTRL_POK_VDDSHV_MAIN_1P8_OV_SEL_PROXY | R/W | 0h | POK_VDDSHV_MAIN_1P8 mode: 0 = Undervoltage (pok_pp_en = 0) Ping-Pong (pok_pp_en = 1) 1 = Overvoltage (pok_pp_en = x) Reset Source: mod_por_rst_n |
| 11 | PRG_PP_1_CTRL_POK_VMON_CAP_MCU_GENERAL_OV_SEL_PROXY | R/W | 0h | POK_VMON_CAP_MCU_GENERAL mode: 0 = Undervoltage (pok_pp_en = 0) Ping-Pong (pok_pp_en = 1) 1 = Overvoltage (pok_pp_en = x) Reset Source: mod_por_rst_n |
| 8 | PRG_PP_1_CTRL_POK_VDDR_CORE_OV_SEL_PROXY | R/W | 0h | POK_VDDR_CORE Mode: 0 = Undervoltage (pok_pp_en = 0) Ping-Pong (pok_pp_en = 1) 1 = Overvoltage (pok_pp_en = x) Reset Source: mod_por_rst_n |
| 7 | RESERVED | NONE | 0h | Reserved |
| 6 | PRG_PP_1_CTRL_POK_VDDS_DDRIO_EN_PROXY | R/W | 1h | Activate POK_VDDS_DDRIO (if pok_en_sel = 1): 0 = POK Detection Deactivated 1 = POK Detection Activated Reset Source: mod_por_rst_n |
| 5 | PRG_PP_1_CTRL_POK_VDDSHV_MAIN_3P3_EN_PROXY | R/W | 1h | Activate POK_VDDSHV_MAIN_3P3 (if pok_en_sel = 1): 0 = POK Detection Deactivated 1 = POK Detection Activated Reset Source: mod_por_rst_n |
| 4 | PRG_PP_1_CTRL_POK_VDDSHV_MAIN_1P8_EN_PROXY | R/W | 1h | Activate POK_VDDSHV_MAIN_1P8 (if pok_en_sel = 1): 0 = POK Detection Deactivated 1 = POK Detection Activated Reset Source: mod_por_rst_n |
| 3 | PRG_PP_1_CTRL_POK_VMON_CAP_MCU_GENERAL_EN_PROXY | R/W | 1h | Activate POK_VMON_CAP_MCU_GENERAL (if pok_en_sel = 1): 0 = POK Detection Deactivated 1 = POK Detection Activated Reset Source: mod_por_rst_n |
| 0 | PRG_PP_1_CTRL_POK_VDDR_CORE_EN_PROXY | R/W | 1h | Activate POK_VDDR_CORE (if pok_en_sel = 1): 0 = POK Detection Deactivated 1 = POK Detection Activated Reset Source: mod_por_rst_n |