SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
| Initiator | QoS Index | Channel Count | Virtual ID Capable | Order ID Capable | Transaction Priority Capable | Address Type Capable | Asel Capable | QoS Block Physical Address |
|---|---|---|---|---|---|---|---|---|
| ICSSM0_PR1_MST_VBUSP0 | 16 | 1 | N | Y | Y | N | Y | 0x45D04000 |
| ICSSM0_PR1_MST_VBUSP1 | 17 | 1 | N | Y | Y | N | Y | 0x45D04400 |
| WKUP_R5FSS0_CPU0_RMST | 80 | 1 | N | Y | Y | N | Y | 0x45D14000 |
| WKUP_R5FSS0_CPU0_WMST | 81 | 1 | N | Y | Y | N | Y | 0x45D14400 |
| WKUP_R5FSS0_CPU0_PMST | 82 | 1 | N | Y | Y | N | Y | 0x45D14800 |
| MCU_M4FSS0_VBUSP_M | 96 | 1 | N | N | Y | N | Y | 0x45D18000 |
| COMPUTE_CLUSTER0_A53_QUAD_WRAP_CBA_AXI_R | 129 | 1 | N | Y | Y | N | Y | 0x45D20400 |
| COMPUTE_CLUSTER0_A53_QUAD_WRAP_CBA_AXI_W | 130 | 1 | N | Y | Y | N | Y | 0x45D20800 |
| GPU0_K3_GPU_M_VBUSM_W | 131 | 6 | N | Y | Y | N | Y | 0x45D20C00 |
| GPU0_K3_GPU_M_VBUSM_R | 132 | 6 | N | Y | Y | N | Y | 0x45D21000 |
| DEBUGSS_WRAP0_VBUSMW | 134 | 1 | N | Y | Y | N | Y | 0x45D21800 |
| DEBUGSS_WRAP0_VBUSMR | 135 | 1 | N | Y | Y | N | Y | 0x45D21C00 |
| GICSS0_MEM_WR_VBUSM | 136 | 1 | N | Y | Y | N | Y | 0x45D22000 |
| GICSS0_MEM_RD_VBUSM | 137 | 1 | N | Y | Y | N | Y | 0x45D22400 |
| MMCSD0_EMMCSDSS_RD | 138 | 1 | N | Y | Y | N | Y | 0x45D22800 |
| MMCSD0_EMMCSDSS_WR | 139 | 1 | N | Y | Y | N | Y | 0x45D22C00 |
| MMCSD1_EMMCSDSS_RD | 140 | 1 | N | Y | Y | N | Y | 0x45D23000 |
| MMCSD1_EMMCSDSS_WR | 141 | 1 | N | Y | Y | N | Y | 0x45D23400 |
| MMCSD2_EMMCSDSS_WR | 142 | 1 | N | Y | Y | N | Y | 0x45D23800 |
| MMCSD2_EMMCSDSS_RD | 143 | 1 | N | Y | Y | N | Y | 0x45D23C00 |
| USB0_MSTW0 | 144 | 1 | N | Y | Y | N | Y | 0x45D24000 |
| USB0_MSTR0 | 145 | 1 | N | Y | Y | N | Y | 0x45D24400 |
| USB1_MSTR0 | 146 | 1 | N | Y | Y | N | Y | 0x45D24800 |
| USB1_MSTW0 | 147 | 1 | N | Y | Y | N | Y | 0x45D24C00 |
| DSS0_VBUSM_DMA | 148 | 4 | N | Y | N | N | Y | 0x45D25000 |
| SA3_SS0_CTXCACH_EXT_DMA | 149 | 1 | N | Y | Y | N | Y | 0x45D25400 |