SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
| Instance | MAIN | MCU | WKUP |
|---|---|---|---|
| CBASS_MCASP0 | ✓ |
| Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
|---|---|---|---|---|
| CBASS_MCASP0 | CLK | MAIN_SYSCLK0/2 | None | |
| CBASS_MCASP0 | MAIN_SYSCLK0_2_CLK | MAIN_SYSCLK0/2 | None |
| Module Instance | Module Interrupt Signal | Destination Interrupt Input | Destination | Description | Type |
|---|---|---|---|---|---|
| CBASS_MCASP0 | CBASS_MCASP0_default_err_intr_0 | GICSS0_spi_133 | GICSS0 | CBASS_MCASP0 interrupt request | level |
| CBASS_MCASP0 | CBASS_MCASP0_default_err_intr_0 | WKUP_R5FSS0_CORE0_intr_147 | WKUP_R5FSS0_CORE0 | CBASS_MCASP0 interrupt request | level |