SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
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| Instance Name | Physical Address |
|---|---|
| MCU_CTRL_MMR0 | 0451 A17Ch |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RST_MAGIC_WORD_MCU_MAGIC_WORD_PROXY | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RST_MAGIC_WORD_MCU_MAGIC_WORD_PROXY | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RST_MAGIC_WORD_MCU_MAGIC_WORD_PROXY | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RST_MAGIC_WORD_MCU_MAGIC_WORD_PROXY | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:0 | RST_MAGIC_WORD_MCU_MAGIC_WORD_PROXY | R/W | 0h | After a MCU_PORz reset this bit field resets to 0x00000000. While this bit field remains 0x00000000 any reset from the Main Domain also propagates through the MCU domain. If the application does not require reset isolation of the MCU domain, it shall leave this bit field with a value of 0x00000000. If the application does require reset isolation of the MCU domain after the initial boot, then the M4FSS CPU must write a nonzero value to the magic word. The actual value is left to software and different values may be used to convey information, but in order to isolate the MCU domain from any warm reset sources that triggers main_resetz, the value must be non-zero. If the value is nonzero and a Main domain warm reset that triggers main_resetz occurs in the main domain, the M4FSS will not be reset. The Main domain bootloader must read this value to determine that the M4FSS is already initialized, and has configured reset isolation. The Main domain bootloader then also skips any initialization steps involving bootstrapping the M4FSS (as it is is already running). Note that MCU_PORz reset is never blocked by a nonzero magic word. Reset Source: mcu_chip1_rst_n |