SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
The bank of registers configures the up/down-scaling coefficients for the vertical resize of the video picture associated with the video window for the phases from 0 to 15. It is used for Crb and Cr setting. It is used only when the pixel format at the input of the filter is one of the YUV formats. When the register is not used by the HW, any value can be used for the bit-fields. Shadow register
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| Instance Name | Physical Address |
|---|---|
| DSS0 | 3020 61C0h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | FIRVC2 | ||||||
| R | R/W | ||||||
| 0h | 0h | ||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| FIRVC2 | FIRVC1 | ||||||
| R/W | R/W | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| FIRVC1 | RESERVED1 | ||||||
| R/W | R | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:30 | RESERVED | R | 0h | Reserved |
| 29:20 | FIRVC2 | R/W | 0h | Signed coefficient C2 for the vertical up/down-scaling with the phase 1 |
| 19:10 | FIRVC1 | R/W | 0h | Signed coefficient C1 for the vertical up/down-scaling with the phase 1 |
| 9:0 | RESERVED1 | R | 0h | Reserved |