SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
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| Instance Name | Physical Address |
|---|---|
| DDR16SS0 | 0F30 D530h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | PHY_AC_CLK_LPBK_CONTROL | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | PHY_AC_CLK_LPBK_ENABLE | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | PHY_AC_CLK_LPBK_OBS_SELECT | ||||||
| NONE | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:22 | RESERVED | NONE | 0h | Reserved |
| 21:16 | PHY_AC_CLK_LPBK_CONTROL | R/W | 0h | Mem clk block loopback control setting. Reset Source: ctl_amod_g_rst_n |
| 15:9 | RESERVED | NONE | 0h | Reserved |
| 8 | PHY_AC_CLK_LPBK_ENABLE | R/W | 0h | Loopback enable for mem clk blocks. Reset Source: ctl_amod_g_rst_n |
| 7:1 | RESERVED | NONE | 0h | Reserved |
| 0 | PHY_AC_CLK_LPBK_OBS_SELECT | R/W | 0h | Select value to map an individual loopback mem clk block observation register to the global observation register. Reset Source: ctl_amod_g_rst_n |