SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
Stream Frame Capture Control configuration. Used to specify the frame count value when when the CSI2RX must generate interrupts FCC_START and FCC_STOP. This register must only be modified when the corresponding frame count enable is disabled.
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| Instance Name | Physical Address |
|---|---|
| CSI_RX_IF0 | 3010 1120h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| FRAME_COUNT_STOP | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| FRAME_COUNT_STOP | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| FRAME_COUNT_START | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| FRAME_COUNT_START | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:16 | FRAME_COUNT_STOP | R/W | 0h | Indicates the frame number on which the interrupt should be generated and the stream will stop outputting data on the pixel interface. [0x0000 will be continuous frames.] |
| 15:0 | FRAME_COUNT_START | R/W | 0h | Indicates the frame number on which the interrupt should be generated and the stream will start outputting data on the pixel interface. [0x0000 will be the current frame.] |