SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
This register contains Lower bits of SD Command Argument
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| Instance Name | Physical Address |
|---|---|
| MMCSD1 | 0FA0 0008h |
| MMCSD2 | 0FA2 0008h |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| CMD_ARG1 | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CMD_ARG1 | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:0 | CMD_ARG1 | R/W | 0h | The SD Command Argument is specified as bit23-8 of Command-Format. Reset Source: vbus_amod_g_rst_n |