SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
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| Instance Name | Physical Address |
|---|---|
| MCU_CTRL_MMR0 | 0451 8000h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED | POR_CTRL_OVRD_SET5 | POR_CTRL_OVRD_SET4 | POR_CTRL_OVRD_SET3 | POR_CTRL_OVRD_SET2 | POR_CTRL_OVRD_SET1 | POR_CTRL_OVRD_SET0 | |
| NONE | R/W | R/W | R/W | R/W | R/W | R/W | |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | |
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | POR_CTRL_OVRD5 | POR_CTRL_OVRD4 | POR_CTRL_OVRD3 | POR_CTRL_OVRD2 | POR_CTRL_OVRD1 | POR_CTRL_OVRD0 | |
| NONE | R/W | R/W | R/W | R/W | R/W | R/W | |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED | |||||||
| NONE | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| POR_CTRL_TRIM_SEL | RESERVED | POR_CTRL_MASK_HHV | RESERVED | ||||
| R/W | NONE | R/W | NONE | ||||
| 0h | 0h | 1h | 0h | ||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:30 | RESERVED | NONE | 0h | Reserved |
| 29 | POR_CTRL_OVRD_SET5 | R/W | 0h | Reserved override set Reset Source: mod_por_rst_n |
| 28 | POR_CTRL_OVRD_SET4 | R/W | 0h | POKLVB override set Reset Source: mod_por_rst_n |
| 27 | POR_CTRL_OVRD_SET3 | R/W | 0h | POKLVA override set Reset Source: mod_por_rst_n |
| 26 | POR_CTRL_OVRD_SET2 | R/W | 0h | POKHV override set Reset Source: mod_por_rst_n |
| 25 | POR_CTRL_OVRD_SET1 | R/W | 0h | BGOK override set Reset Source: mod_por_rst_n |
| 24 | POR_CTRL_OVRD_SET0 | R/W | 0h | PORHV override set Reset Source: mod_por_rst_n |
| 23:22 | RESERVED | NONE | 0h | Reserved |
| 21 | POR_CTRL_OVRD5 | R/W | 0h | Reserved override activate Reset Source: mod_por_rst_n |
| 20 | POR_CTRL_OVRD4 | R/W | 0h | POKLVB override activate Reset Source: mod_por_rst_n |
| 19 | POR_CTRL_OVRD3 | R/W | 0h | POKLVA override activate Reset Source: mod_por_rst_n |
| 18 | POR_CTRL_OVRD2 | R/W | 0h | POKHV override activate Reset Source: mod_por_rst_n |
| 17 | POR_CTRL_OVRD1 | R/W | 0h | BGOK override activate Reset Source: mod_por_rst_n |
| 16 | POR_CTRL_OVRD0 | R/W | 0h | PORHV override activate Reset Source: mod_por_rst_n |
| 15:8 | RESERVED | NONE | 0h | Reserved |
| 7 | POR_CTRL_TRIM_SEL | R/W | 0h | POR Trim Select 0 - Trim selections for Bandgap and POKs come from HHV defaults 1 - Trim selections for Bandgap and POKs come from POR_BANDGAP_CTRL and POR_POKxxx_CTRL registers Reset Source: mod_por_rst_n |
| 6:5 | RESERVED | NONE | 0h | Reserved |
| 4 | POR_CTRL_MASK_HHV | R/W | 1h | Mask HHV/SOC_PORz outputs when applying new trim values Reset Source: mod_por_rst_n |
| 3:0 | RESERVED | NONE | 0h | Reserved |