SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
| Instance | MAIN | MCU | WKUP |
|---|---|---|---|
| DPHY_RX0 | ✓ |
| Module Instance | Power Sleep Controller | Power Domain | Module Domain | Index | Default | Controllable | Dependencies |
|---|---|---|---|---|---|---|---|
| DPHY_RX0 | PSC0 | GP_Core_CTL | LPSC_DPHY_0 | 26 | OFF | YES | LPSC_main_IP |
| Module Instance | Module Clock Input | Source Clock | Source Control Register | Description |
|---|---|---|---|---|
| DPHY_RX0 | RXCLKN | CSI0_RXCLKN (PIN) | clock lane differential pair in | |
| DPHY_RX0 | RXCLKP | CSI0_RXCLKP (PIN) | clock lane differential pair in | |
| DPHY_RX0 | MAIN_CLK | MAIN_SYSCLK0/4 | clock for lane module state machine and analog reference clock |
| Module Instance | Source | Description |
|---|---|---|
| DPHY_RX0 | PSC0 | DPHY_RX0 reset |