SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
Instruction Set Attribute Register 0 (low word)
Return to Summary Table
| Instance Name | Physical Address |
|---|---|
| A53SS0 | 0007 3021 0D30h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RES0_ID_AA64ISAR0_EL1_31_0_31_20 | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RES0_ID_AA64ISAR0_EL1_31_0_31_20 | CRC32 | ||||||
| R/W | R/W | ||||||
| 0h | 1h | ||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| SHA2 | SHA1 | ||||||
| R/W | R/W | ||||||
| 1h | 1h | ||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| AES | RES0_ID_AA64ISAR0_EL1_31_0_3_0 | ||||||
| R/W | R/W | ||||||
| 2h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:20 | RES0_ID_AA64ISAR0_EL1_31_0_31_20 | R/W | 0h | Reserved, RES0. |
| 19:16 | CRC32 | R/W | 1h | CRC32 instructions in AArch64. Possible values of this field are: 0000 No CRC32 instructions implemented. 0001 CRC32B, CRC32H, CRC32W, CRC32X, CRC32CB, CRC32CH, CRC32CW, and CRC32CX instructions implemented. All other values are reserved.This field must have the same value as ID_ISAR5.CRC32. The architecture requires that if CRC32 is supported in one Execution state, it must be supported in both Execution states. |
| 15:12 | SHA2 | R/W | 1h | SHA2 instructions in AArch64. Possible values of this field are: 0000 No SHA2 instructions implemented. 0001 SHA256H, SHA256H2, SHA256SU0, and SHA256SU1 instructions implemented. All other values are reserved. |
| 11:8 | SHA1 | R/W | 1h | SHA1 instructions in AArch64. Possible values of this field are: 0000 No SHA1 instructions implemented. 0001 SHA1C, SHA1P, SHA1M, SHA1H, SHA1SU0, and SHA1SU1 instructions implemented. All other values are reserved. |
| 7:4 | AES | R/W | 2h | AES instructions in AArch64. Possible values of this field are: 0000 No AES instructions implemented. 0001 AESE, AESD, AESMC, and AESIMC instructions implemented. 0010 As for 0b0001, plus PMULL/PMULL2 instructions operating on 64-bit data quantities. |
| 3:0 | RES0_ID_AA64ISAR0_EL1_31_0_3_0 | R/W | 0h | Reserved, RES0. |