SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
| Step | Register/Bit Field/Programming Model | Value |
|---|---|---|
| Configure register submode TCR_TLR | see Table 12-121 | 0x7 |
| Load the start and halt trigger value. | UART_TCR[7-4] AUTO_RTS_START | 0x- |
| UART_TCR[3-0] AUTO_RTS_HALT | ||
| Enable or disable receive and transmit hardware flow control mode. | UART_EFR[7] AUTO_CTS_EN | 0x- |
| UART_EFR[6] AUTO_RTS_EN |