SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
CBASS ISC Registers are described in Table 3-6.
Each ISC block contains a set of MMRs for each region/channel: Control MMR, start address, and end address. If an ISC block is configured to have x region/channels, this ISC block contains x+1 sets of MMRs.
| Address Offset | Register Mnemonic | Register Name |
|---|---|---|
| (b*0x20), b=0..31 | REGION[b]_CONTROL | ISC a Region b Control Register |
| (b*0x20)+0x10, b=0..31 | REGION[b]_START_ADDR_L | ISC a Region b Start Address Low Register |
| (b*0x20)+0x14, b=0..31 | REGION[b]_START_ADDR_H | ISC a Region b Start Address High Register |
| (b*0x20)+0x18, b=0..31 | REGION[b]_END_ADDR_L | ISC a Region b End Address Low Register |
| (b*0x20)+0x1c, b=0..31 | REGION[b]_END_ADDR_H | ISC a Region b End Address High Register |
Each ISC can be configured in one of two modes: region mode and channel mode.
When the region mode is configured, the start and end address MMRs shall be programmed with an SoC address range.
When ISC is configured as channel mode, the start and end address MMRs shall be programmed using channel number.
Each region and channel can be configured to determine whether to overwrite or add values for priv, privID, and secure attributes. A default value for the control MMR, located at offset x*0x20, is used so that transactions do not map to a valid region.
The following is the SW sequence to modify the default ISC setting for region/channel b: