| DCC0 |
DCC_CLKSRC0_CLK |
MAIN_PLL0_HSDIV1_CLKOUT |
|
counter1 clock source |
| DCC0 |
DCC_CLKSRC1_CLK |
MAIN_PLL0_HSDIV2_CLKOUT |
|
counter1 clock source |
| DCC0 |
DCC_CLKSRC2_CLK |
MAIN_PLL0_HSDIV3_CLKOUT |
|
counter1 clock source |
| DCC0 |
DCC_CLKSRC3_CLK |
MAIN_PLL0_HSDIV4_CLKOUT |
|
counter1 clock source |
| DCC0 |
DCC_CLKSRC4_CLK |
CLK_12M_RC |
|
counter1 clock source |
| DCC0 |
DCC_CLKSRC4_CLK |
HFOSC0 (INSTANCE) |
|
counter1 clock source |
| DCC0 |
DCC_CLKSRC5_CLK |
EXT_REFCLK1 |
|
counter1 clock source |
| DCC0 |
DCC_CLKSRC6_CLK |
MAIN_SYSCLK0 |
|
counter1 clock source |
| DCC0 |
DCC_CLKSRC7_CLK |
MAIN_PLL2_HSDIV8_CLKOUT |
|
counter1 clock source |
| DCC0 |
DCC_INPUT00_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC0 |
DCC_INPUT00_CLK |
HFOSC0 (INSTANCE) |
|
primary oscillator clock |
| DCC0 |
DCC_INPUT01_CLK |
EXT_REFCLK1 |
|
primary oscillator clock |
| DCC0 |
DCC_INPUT02_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC0 |
DCC_INPUT10_CLK |
MAIN_SYSCLK0/2 |
|
secondary oscillator clock |
| DCC0 |
FICLK |
MAIN_SYSCLK0/4 |
|
functional and interface clock |
| DCC1 |
DCC_CLKSRC0_CLK |
MAIN_PLL0_HSDIV5_CLKOUT |
|
counter1 clock source |
| DCC1 |
DCC_CLKSRC1_CLK |
MAIN_PLL0_HSDIV6_CLKOUT |
|
counter1 clock source |
| DCC1 |
DCC_CLKSRC2_CLK |
MAIN_PLL0_HSDIV7_CLKOUT |
|
counter1 clock source |
| DCC1 |
DCC_CLKSRC3_CLK |
MAIN_PLL1_HSDIV1_CLKOUT |
|
counter1 clock source |
| DCC1 |
DCC_CLKSRC4_CLK |
MAIN_PLL0_HSDIV9_CLKOUT |
|
counter1 clock source |
| DCC1 |
DCC_CLKSRC5_CLK |
MAIN_PLL1_HSDIV0_CLKOUT |
|
counter1 clock source |
| DCC1 |
DCC_CLKSRC6_CLK |
CLK_12M_RC |
|
counter1 clock source |
| DCC1 |
DCC_CLKSRC7_CLK |
MAIN_PLL1_HSDIV2_CLKOUT |
|
counter1 clock source |
| DCC1 |
DCC_INPUT00_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC1 |
DCC_INPUT00_CLK |
HFOSC0 (INSTANCE) |
|
primary oscillator clock |
| DCC1 |
DCC_INPUT01_CLK |
EXT_REFCLK1 |
|
primary oscillator clock |
| DCC1 |
DCC_INPUT02_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC1 |
DCC_INPUT10_CLK |
MAIN_SYSCLK0/4 |
|
secondary oscillator clock |
| DCC1 |
FICLK |
MAIN_SYSCLK0/4 |
|
functional and interface clock |
| DCC2 |
DCC_CLKSRC0_CLK |
MAIN_PLL1_HSDIV3_CLKOUT |
|
counter1 clock source |
| DCC2 |
DCC_CLKSRC1_CLK |
MAIN_PLL15_HSDIV0_CLKOUT |
|
counter1 clock source |
| DCC2 |
DCC_CLKSRC2_CLK |
MAIN_PLL1_HSDIV5_CLKOUT |
|
counter1 clock source |
| DCC2 |
DCC_CLKSRC3_CLK |
MAIN_PLL1_HSDIV6_CLKOUT |
|
counter1 clock source |
| DCC2 |
DCC_CLKSRC4_CLK |
MAIN_PLL2_HSDIV0_CLKOUT |
|
counter1 clock source |
| DCC2 |
DCC_CLKSRC5_CLK |
MAIN_PLL15_HSDIV1_CLKOUT |
|
counter1 clock source |
| DCC2 |
DCC_CLKSRC6_CLK |
MAIN_PLL2_HSDIV2_CLKOUT |
|
counter1 clock source |
| DCC2 |
DCC_CLKSRC7_CLK |
RMII2_REF_CLK (PIN) |
|
counter1 clock source |
| DCC2 |
DCC_INPUT00_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC2 |
DCC_INPUT00_CLK |
HFOSC0 (INSTANCE) |
|
primary oscillator clock |
| DCC2 |
DCC_INPUT01_CLK |
EXT_REFCLK1 |
|
primary oscillator clock |
| DCC2 |
DCC_INPUT02_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC2 |
DCC_INPUT10_CLK |
MAIN_SYSCLK0/4 |
|
secondary oscillator clock |
| DCC2 |
FICLK |
MAIN_SYSCLK0/4 |
|
functional and interface clock |
| DCC3 |
DCC_CLKSRC0_CLK |
MAIN_PLL1_HSDIV0_CLKOUT |
|
counter1 clock source |
| DCC3 |
DCC_CLKSRC1_CLK |
MAIN_PLL2_HSDIV5_CLKOUT |
|
counter1 clock source |
| DCC3 |
DCC_CLKSRC3_CLK |
MAIN_PLL2_HSDIV7_CLKOUT |
|
counter1 clock source |
| DCC3 |
DCC_CLKSRC4_CLK |
MAIN_PLL2_HSDIV6_CLKOUT |
|
counter1 clock source |
| DCC3 |
DCC_CLKSRC5_CLK |
MAIN_PLL2_HSDIV9_CLKOUT |
|
counter1 clock source |
| DCC3 |
DCC_CLKSRC6_CLK |
MAIN_PLL8_HSDIV0_CLKOUT/4 |
|
counter1 clock source |
| DCC3 |
DCC_CLKSRC7_CLK |
MAIN_PLL12_HSDIV0_CLKOUT |
|
counter1 clock source |
| DCC3 |
DCC_INPUT00_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC3 |
DCC_INPUT00_CLK |
HFOSC0 (INSTANCE) |
|
primary oscillator clock |
| DCC3 |
DCC_INPUT01_CLK |
EXT_REFCLK1 |
|
primary oscillator clock |
| DCC3 |
DCC_INPUT02_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC3 |
DCC_INPUT10_CLK |
MAIN_SYSCLK0/4 |
|
secondary oscillator clock |
| DCC3 |
FICLK |
MAIN_SYSCLK0/4 |
|
functional and interface clock |
| DCC4 |
DCC_CLKSRC1_CLK |
CP_GEMAC_CPTS_REF_CLK |
|
counter1 clock source |
| DCC4 |
DCC_CLKSRC2_CLK |
AUDIO_EXT_REFCLK1 (PIN) |
|
counter1 clock source |
| DCC4 |
DCC_CLKSRC3_CLK |
DPHY_RX0 (INSTANCE) |
|
counter1 clock source |
| DCC4 |
DCC_CLKSRC4_CLK |
MCU_EXT_REFCLK0 |
|
counter1 clock source |
| DCC4 |
DCC_CLKSRC5_CLK |
RMII1_REF_CLK (PIN)/4 |
|
counter1 clock source |
| DCC4 |
DCC_CLKSRC7_CLK |
CLK_32K |
MCU_CTRL_MMR_CFG0_DEVICE_CLKOUT_32K_CTRL[1:0]=0 |
counter1 clock source |
| DCC4 |
DCC_CLKSRC7_CLK |
MCU_HSDIV0_16FFT32 (INSTANCE) |
MCU_CTRL_MMR_CFG0_DEVICE_CLKOUT_32K_CTRL[1:0]=1 |
counter1 clock source |
| DCC4 |
DCC_CLKSRC7_CLK |
CLK_32K_RC |
MCU_CTRL_MMR_CFG0_DEVICE_CLKOUT_32K_CTRL[1:0]=2 |
counter1 clock source |
| DCC4 |
DCC_CLKSRC7_CLK |
LFOSC0 (INSTANCE) |
MCU_CTRL_MMR_CFG0_DEVICE_CLKOUT_32K_CTRL[1:0]=3 |
counter1 clock source |
| DCC4 |
DCC_INPUT00_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC4 |
DCC_INPUT00_CLK |
HFOSC0 (INSTANCE) |
|
primary oscillator clock |
| DCC4 |
DCC_INPUT01_CLK |
EXT_REFCLK1 |
|
primary oscillator clock |
| DCC4 |
DCC_INPUT02_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC4 |
DCC_INPUT10_CLK |
MAIN_SYSCLK0/2 |
|
secondary oscillator clock |
| DCC4 |
FICLK |
MAIN_SYSCLK0/4 |
|
functional and interface clock |
| DCC5 |
DCC_CLKSRC0_CLK |
MAIN_PLL0_HSDIV8_CLKOUT |
|
counter1 clock source |
| DCC5 |
DCC_CLKSRC1_CLK |
MAIN_PLL1_HSDIV4_CLKOUT |
|
counter1 clock source |
| DCC5 |
DCC_CLKSRC2_CLK |
MAIN_PLL2_HSDIV1_CLKOUT |
|
counter1 clock source |
| DCC5 |
DCC_CLKSRC3_CLK |
MAIN_PLL2_HSDIV3_CLKOUT |
|
counter1 clock source |
| DCC5 |
DCC_CLKSRC4_CLK |
MAIN_PLL2_HSDIV4_CLKOUT |
|
counter1 clock source |
| DCC5 |
DCC_CLKSRC5_CLK |
MAIN_PLL16_HSDIV0_CLKOUT/4 |
|
counter1 clock source |
| DCC5 |
DCC_CLKSRC6_CLK |
MAIN_PLL17_HSDIV0_CLKOUT |
|
counter1 clock source |
| DCC5 |
DCC_INPUT00_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC5 |
DCC_INPUT00_CLK |
HFOSC0 (INSTANCE) |
|
primary oscillator clock |
| DCC5 |
DCC_INPUT01_CLK |
EXT_REFCLK1 |
|
primary oscillator clock |
| DCC5 |
DCC_INPUT02_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC5 |
DCC_INPUT10_CLK |
MAIN_SYSCLK0 |
|
secondary oscillator clock |
| DCC5 |
FICLK |
MAIN_SYSCLK0/4 |
|
functional and interface clock |
| DCC6 |
DCC_CLKSRC0_CLK |
VOUT0_EXTPCLKIN (PIN) |
|
counter1 clock source |
| DCC6 |
DCC_CLKSRC1_CLK |
MCASP0_ACLKX (PIN) |
|
counter1 clock source |
| DCC6 |
DCC_CLKSRC2_CLK |
MCASP0_ACLKR (PIN) |
|
counter1 clock source |
| DCC6 |
DCC_CLKSRC3_CLK |
MCASP1_ACLKX (PIN) |
|
counter1 clock source |
| DCC6 |
DCC_CLKSRC4_CLK |
MCASP1_ACLKR (PIN) |
|
counter1 clock source |
| DCC6 |
DCC_CLKSRC5_CLK |
MCASP2_ACLKX (PIN) |
|
counter1 clock source |
| DCC6 |
DCC_CLKSRC6_CLK |
MCASP2_ACLKR (PIN) |
|
counter1 clock source |
| DCC6 |
DCC_CLKSRC7_CLK |
AUDIO_EXT_REFCLK0 (PIN) |
|
counter1 clock source |
| DCC6 |
DCC_INPUT00_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC6 |
DCC_INPUT00_CLK |
HFOSC0 (INSTANCE) |
|
primary oscillator clock |
| DCC6 |
DCC_INPUT01_CLK |
EXT_REFCLK1 |
|
primary oscillator clock |
| DCC6 |
DCC_INPUT02_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| DCC6 |
DCC_INPUT10_CLK |
MAIN_SYSCLK0 |
|
secondary oscillator clock |
| DCC6 |
FICLK |
MAIN_SYSCLK0/4 |
|
functional and interface clock |
| MCU_DCC0 |
DCC_CLKSRC0_CLK |
MCU_PLL0_HSDIV0_CLKOUT |
|
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC1_CLK |
MCU_PLL0_HSDIV1_CLKOUT |
|
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC2_CLK |
MCU_PLL0_HSDIV2_CLKOUT |
|
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC3_CLK |
MCU_PLL0_HSDIV3_CLKOUT |
|
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC4_CLK |
MCU_PLL0_HSDIV4_CLKOUT |
|
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC5_CLK |
CLK_32K_RC |
|
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC6_CLK |
CLK_32K |
MCU_CTRL_MMR_CFG0_DEVICE_CLKOUT_32K_CTRL[1:0]=0 |
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC6_CLK |
MCU_HSDIV0_16FFT32 (INSTANCE) |
MCU_CTRL_MMR_CFG0_DEVICE_CLKOUT_32K_CTRL[1:0]=1 |
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC6_CLK |
CLK_32K_RC |
MCU_CTRL_MMR_CFG0_DEVICE_CLKOUT_32K_CTRL[1:0]=2 |
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC6_CLK |
LFOSC0 (INSTANCE) |
MCU_CTRL_MMR_CFG0_DEVICE_CLKOUT_32K_CTRL[1:0]=3 |
counter1 clock source |
| MCU_DCC0 |
DCC_CLKSRC7_CLK |
MCU_EXT_REFCLK0 |
|
counter1 clock source |
| MCU_DCC0 |
DCC_INPUT00_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| MCU_DCC0 |
DCC_INPUT00_CLK |
HFOSC0 (INSTANCE) |
|
primary oscillator clock |
| MCU_DCC0 |
DCC_INPUT01_CLK |
CLK_32K_RC |
|
primary oscillator clock |
| MCU_DCC0 |
DCC_INPUT02_CLK |
CLK_12M_RC |
|
primary oscillator clock |
| MCU_DCC0 |
DCC_INPUT10_CLK |
MCU_SYSCLK0/2 |
|
secondary oscillator clock |
| MCU_DCC0 |
FICLK |
MCU_SYSCLK0/4 |
|
functional and interface clock |