SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
In controller mode, configure the target address register by programming the I2C_SA[9-0] SA bit field and the number of data bytes (I2C data payload) associated with the transfer by programming the I2C_CNT[15-0] DCOUNT bit field.
For a 10-bit address, set the I2C_CON[8] XSA bit to 1.