17.5.30 GPIOPP Register (Offset = 0xFC0) [reset = 0x1]
GPIO Peripheral Property (GPIOPP)
The GPIOPP register provides information regarding the GPIO properties.
GPIOPP is shown in Figure 17-34 and described in Table 17-41.
Return to Summary Table.
Figure 17-34 GPIOPP Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| RESERVED |
| R-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| RESERVED |
EDE |
| R-0x0 |
R-0x1 |
|
Table 17-41 GPIOPP Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-1 |
RESERVED |
R |
0x0 |
|
| 0 |
EDE |
R |
0x1 |
Extended Drive Enable.
This bit specifies whether the extended drive capabilities are provided.
Extended drive is configured by the EDM bits in the GPIOPC register.
0x0 = No Extended Drive Capability provided.
0x1 = Extended Drive Capability provided.
|