SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
CTI Device Architecture Register
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| Instance Name | Physical Address |
|---|---|
| A53SS0 | 0007 3034 0FBCh |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| ARCHITECT | |||||||
| R/W | |||||||
| 23Bh | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| ARCHITECT | PRESENT | REVISION | |||||
| R/W | R/W | R/W | |||||
| 23Bh | 1h | 0h | |||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| ARCHID | |||||||
| R/W | |||||||
| 1A14h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| ARCHID | |||||||
| R/W | |||||||
| 1A14h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:21 | ARCHITECT | R/W | 23Bh | Defines the architecture of the component. For CTI, this is ARM Limited.Bits [31:28] are the JEP 106 continuation code, 0x4.Bits [27:21] are the JEP 106 ID code, 0x3B. |
| 20 | PRESENT | R/W | 1h | When set to 1, indicates that the DEVARCH is present.This field is 1 in v8-A. |
| 19:16 | REVISION | R/W | 0h | Defines the architecture revision. For architectures defined by ARM this is the minor revision.For CTI, the revision defined by v8-A is 0x0.All other values are reserved. |
| 15:0 | ARCHID | R/W | 1A14h | Defines this part to be a v8-A debug component. For architectures defined by ARM this is further subdivided.For CTI:Bits [15:12] are the architecture version, 0x1.Bits [11:0] are the architecture part number, 0xA14.This corresponds to CTI architecture version CTIv2. |