SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
CTI Integration mode Control Register
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| Instance Name | Physical Address |
|---|---|
| A53SS0 | 0007 3034 0F00h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RES0_CTIITCTRL_31_1 | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RES0_CTIITCTRL_31_1 | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RES0_CTIITCTRL_31_1 | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RES0_CTIITCTRL_31_1 | IME | ||||||
| R/W | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:1 | RES0_CTIITCTRL_31_1 | R/W | 0h | Reserved, RES0. |
| 0 | IME | R/W | 0h | Integration mode enable. When IME == 1, the device reverts to an integration mode to enable integration testing or topology detection. The integration mode behavior is IMPLEMENTATION DEFINED. 0 Normal operation. 1 Integration mode enabled. |