SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
CTI Input Trigger to Output Channel Enable Register 0
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| Instance Name | Physical Address |
|---|---|
| A53SS0 | 0007 3034 0020h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED_CTIINEN0_31_4 | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED_CTIINEN0_31_4 | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_CTIINEN0_31_4 | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_CTIINEN0_31_4 | INENX | ||||||
| R/W | R/W | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:4 | RESERVED_CTIINEN0_31_4 | R/W | 0h | Reserved RES0 |
| 3:0 | INENX | R/W | 0h | Input trigger 0 to output channel <x> enable |