SPRUIV7C May 2022 – November 2025 AM620-Q1 , AM623 , AM625 , AM625-Q1 , AM625SIP
Stream Monitor configuration. This register is used to configure the CSI2RX Monitors: Programmable Frame monitor to trigger an event if a truncated frame is detected, Programmable Timer to trigger an event based on a clock cycle counter after a frame start or frame end, Programmable line/byte counters to trigger an event at a specific byte in a line. This register is used to enable/disable CSI2RX programmable interrupt, select the virtual channel for each programmable IT and select the point which will trigger the event. This register should not be modified while the data path is enabled, nor should any of settings be changed when the respective monitor/counter/timer is enabled. In these cases, the behaviour is unpredictable. Hard reset value is 0x00000000, all interrupt generators disabled on Virtual Channel 0.
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| Instance Name | Physical Address |
|---|---|
| CSI_RX_IF0 | 3010 1410h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| FRAME_LENGTH | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| FRAME_LENGTH | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| FRAME_MON_EN | FRAME_MON_VC | TIMER_EOF | TIMER_EN | TIMER_VC | |||
| R/W | R/W | R/W | R/W | R/W | |||
| 0h | 0h | 0h | 0h | 0h | |||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| TIMER_VC | LB_EN | LB_VC | |||||
| R/W | R/W | R/W | |||||
| 0h | 0h | 0h | |||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:16 | FRAME_LENGTH | R/W | 0h | Indicates the frame length in lines to detect truncated frames. This value must not change while monitor is enabled, i.e. it must only be changed when the frame_mon_en bit is low. 0x0000 means truncated frame detection feature disabled |
| 15 | FRAME_MON_EN | R/W | 0h | Enables monitor. This bit must only be set high after the frame_mon_vc and frame_length have been set. |
| 14:11 | FRAME_MON_VC | R/W | 0h | Indicates virtual channel for monitor. This value must not change while monitor is enabled, i.e. it must only be changed when the frame_mon_en bit is low. |
| 10 | TIMER_EOF | R/W | 0h | Select the starting point of the timer: 0x0: Start of Frame event on selected virtual channel 0x1: End of Frame event on selected virtual channel. This value must not change while timer_en is enabled |
| 9 | TIMER_EN | R/W | 0h | Enables timer based interrupt. This bit must only be set high after the timer_eof and timer_vc have been set. |
| 8:5 | TIMER_VC | R/W | 0h | Indicates which VC should be used to generate timer based interrupt. This value must not change while timer_en is enabled. |
| 4 | LB_EN | R/W | 0h | Enables line/byte counter. This bit must only be set high after the lb_vc, line_count and byte_count have been set. |
| 3:0 | LB_VC | R/W | 0h | Indicates which VC should be used to generate line/byte counter interrupt. This value must not change while lb_en is enabled |