产品详情

Sample rate (max) (Msps) 40 Resolution (Bits) 12 Number of input channels 4 Interface type Parallel LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1 Power consumption (typ) (mW) 607 Architecture Pipeline SNR (dB) 70.5 ENOB (Bits) 11.3 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 40 Resolution (Bits) 12 Number of input channels 4 Interface type Parallel LVDS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 1 Power consumption (typ) (mW) 607 Architecture Pipeline SNR (dB) 70.5 ENOB (Bits) 11.3 SFDR (dB) 87 Operating temperature range (°C) -40 to 85 Input buffer No
HTQFP (PAP) 64 144 mm² 12 x 12
  • Maximum Sample Rate: 40MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 584mW
    External Reference: 518mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 70.5dBFS SNR at 10MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • HTQFP-64 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking
    • Communications

PowerPAD Is a trademark of Texas Instruments
All other trademarks are the property of their respective owners

  • Maximum Sample Rate: 40MSPS
  • 12-Bit Resolution
  • No Missing Codes
  • Total Power Dissipation:
    Internal Reference: 584mW
    External Reference: 518mW
  • CMOS Technology
  • Simultaneous Sample-and-Hold
  • 70.5dBFS SNR at 10MHz IF
  • 3.3V Digital/Analog Supply
  • Serialized LVDS Outputs
  • Integrated Frame and Bit Patterns
  • Option to Double LVDS Clock Output Currents
  • Four Current Modes for LVDS
  • Pin- and Format-Compatible Family
  • HTQFP-64 PowerPAD Package
  • APPLICATIONS
    • Portable Ultrasound Systems
    • Tape Drives
    • Test Equipment
    • Optical Networking
    • Communications

PowerPAD Is a trademark of Texas Instruments
All other trademarks are the property of their respective owners

The ADS5240 is a high-performance, 40MSPS, 4-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the four data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5240 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode.

The device is available in an HTQFP-64 PowerPAD package and is specified over a -40°C to +85°C operating range.

The ADS5240 is a high-performance, 40MSPS, 4-channel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop (PLL) multiplies the incoming ADC sampling clock by a factor of 12. This high-frequency LVDS clock is used in the data serialization and transmission process. The word output of each internal ADC is serialized and transmitted either MSB or LSB first. In addition to the four data outputs, a bit clock and a word clock are also transmitted. The bit clock is at 6x the speed of the sampling clock, whereas the word clock is at the same speed of the sampling clock.

The ADS5240 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode.

The device is available in an HTQFP-64 PowerPAD package and is specified over a -40°C to +85°C operating range.

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 4-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface 数据表 (Rev. E) 2009年 1月 6日
应用手册 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015年 5月 22日
应用手册 Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013年 7月 19日
应用手册 Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 2010年 9月 10日
应用手册 Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 2009年 4月 28日
应用手册 所选封装材料的热学和电学性质 2008年 10月 16日
应用手册 模数规格和性能特性术语表 (Rev. A) 最新英语版本 (Rev.B) 2008年 10月 16日
应用手册 高速数据转换 英语版 2008年 10月 16日
应用手册 CDCE62005 as Clock Solution for High-Speed ADCs 2008年 9月 4日
应用手册 CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008年 6月 8日
应用手册 Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008年 6月 2日
应用手册 Interfacing High-Speed LVDS Outputs of the ADS527x/ADS524x 2005年 2月 23日

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仿真模型

ADS5240 IBIS Model

SBAM003.ZIP (19 KB) - IBIS Model
计算工具

ADC-HARMONIC-CALC ADC Frequency Calculator Download

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

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计算工具

ANALOG-ENGINEER-CALC PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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计算工具

JITTER-SNR-CALC Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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支持的产品和硬件

模拟工具

PSPICE-FOR-TI — PSpice® for TI 设计和仿真工具

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。 

在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
封装 引脚 CAD 符号、封装和 3D 模型
HTQFP (PAP) 64 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

支持和培训

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