产品详情

Sample rate (max) (Msps) 40 Resolution (Bits) 12 Number of input channels 2 Interface type Parallel CMOS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 285 Architecture Pipeline SNR (dB) 70.7 ENOB (Bps) 11.2 SFDR (dB) 86 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 40 Resolution (Bits) 12 Number of input channels 2 Interface type Parallel CMOS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 285 Architecture Pipeline SNR (dB) 70.7 ENOB (Bps) 11.2 SFDR (dB) 86 Operating temperature range (°C) -40 to 85 Input buffer No
TQFP (PAG) 64 144 mm² 12 x 12
  • Single +3.3V Supply
  • High SNR: 70.7dBFS at fIN = 5MHz
  • Total Power Dissipation: Internal Reference: 321mW External Reference: 285mW
  • Internal or External Reference
  • Low DNL: ±0.3LSB
  • Flexible Input Range: 1.5VPP to 2VPP
  • TQFP-64 Package
  • APPLICATIONS
    • Communications IF Processing
    • Communications Base Stations
    • Test Equipment
    • Medical Imaging
    • Video Digitizing
    • CCD Digitizing

All other trademarks are the property of their respective owners

  • Single +3.3V Supply
  • High SNR: 70.7dBFS at fIN = 5MHz
  • Total Power Dissipation: Internal Reference: 321mW External Reference: 285mW
  • Internal or External Reference
  • Low DNL: ±0.3LSB
  • Flexible Input Range: 1.5VPP to 2VPP
  • TQFP-64 Package
  • APPLICATIONS
    • Communications IF Processing
    • Communications Base Stations
    • Test Equipment
    • Medical Imaging
    • Video Digitizing
    • CCD Digitizing

All other trademarks are the property of their respective owners

The ADS5231 is a dual, high-speed, high dynamic range, 12-bit pipelined analog-to-digital converter (ADC). This converter includes a high-bandwidth sample-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The differential nature of the sample-and-hold amplifier and ADC circuitry minimizes even-order harmonics and gives excellent common-mode noise immunity.

The ADS5231 provides for setting the full-scale range of the converter without any external reference circuitry. The internal reference can be disabled, allowing low-drive, external references to be used for improved tracking in multichannel systems.

The ADS5231 provides an over-range indicator flag to indicate an input signal that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of front-end gain control circuitry. There is also an output enable pin to allow for multiplexing and testing on a printed circuit board (PCB).

The ADS5231 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. The ADS5231 is available in a TQFP-64 package.

The ADS5231 is a dual, high-speed, high dynamic range, 12-bit pipelined analog-to-digital converter (ADC). This converter includes a high-bandwidth sample-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The differential nature of the sample-and-hold amplifier and ADC circuitry minimizes even-order harmonics and gives excellent common-mode noise immunity.

The ADS5231 provides for setting the full-scale range of the converter without any external reference circuitry. The internal reference can be disabled, allowing low-drive, external references to be used for improved tracking in multichannel systems.

The ADS5231 provides an over-range indicator flag to indicate an input signal that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of front-end gain control circuitry. There is also an output enable pin to allow for multiplexing and testing on a printed circuit board (PCB).

The ADS5231 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. The ADS5231 is available in a TQFP-64 package.

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类型 项目标题 下载最新的英语版本 日期
* 数据表 Dual, 12-Bit, 40MSPS, +3.3V Analog-to-Digital Converter 数据表 (Rev. A) 2007年 1月 16日
应用手册 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015年 5月 22日
应用手册 Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013年 7月 19日
应用手册 Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 2010年 9月 10日
应用手册 Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 2009年 4月 28日
应用手册 所选封装材料的热学和电学性质 2008年 10月 16日
应用手册 模数规格和性能特性术语表 (Rev. A) 下载最新的英文版本 (Rev.B) 2008年 10月 16日
应用手册 高速数据转换 下载英文版本 2008年 10月 16日
应用手册 CDCE62005 as Clock Solution for High-Speed ADCs 2008年 9月 4日
应用手册 CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008年 6月 8日
应用手册 Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008年 6月 2日
EVM 用户指南 ADS5231/32/37 EVM (Rev. B) 2007年 11月 14日

设计和开发

如需其他信息或资源,请查看下方列表,点击标题即可进入详情页面。

评估板

ADS5231EVM — ADS5231 双通道、12 位、40MSPS 模数转换器评估模块

ADS5231EVM 旨在方便地评估具有 CMOS 输出的双路 12 位40MSPS ADS5231 模数转换器的性能。ADS5231EVM 可与 ADC 数字采集卡 TSW1100 配对使用,以便快速评估器件的性能。

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仿真模型

ADS5231 IBIS Model

SBAM156.ZIP (28 KB) - IBIS Model
计算工具

ADC-HARMONIC-CALC — 模数转换器 (ADC) 谐波计算器

    ADC 谐波计算工具是基于 excel 的计算器,用于确定当模数转换器中出现奈奎斯特混叠后高次谐波的频率空间的位置。

    如果给定 ADC 采样速率和有用信号的范围,该计算器可以确定第 2 至第 9 谐波是否会返送到有用信号的频带中。图表以图形方式显示了在出现奈奎斯特混叠后基本信号以及第 2 至第 9 谐波的位置。

计算工具

JITTER-SNR-CALC — 用于 ADC 的抖动和 SNR 计算器

JITTER-SNR-CALC 可用于根据输入频率和时钟抖动来计算 ADC 的理论信噪比 (SNR) 性能。
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PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用,包括业内超大的模型库之一,涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短产品上市时间并降低开发成本。

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TQFP (PAG) 64 了解详情

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 认证摘要
  • 持续可靠性监测

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