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模数转换器 (ADC)
高速 ADC (≥10 MSPS)

ADS5421

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14 位、40MSPS 模数转换器 (ADC)

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ADS5421

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产品详情

Sample rate (max) (Msps) 40 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 300 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2, 4 Power consumption (typ) (mW) 900 Architecture Pipeline SNR (dB) 76 ENOB (Bits) 12.1 SFDR (dB) 83 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 40 Resolution (Bits) 14 Number of input channels 1 Interface type Parallel LVDS Analog input BW (MHz) 300 Features High Performance Rating Catalog Peak-to-peak input voltage range (V) 2, 4 Power consumption (typ) (mW) 900 Architecture Pipeline SNR (dB) 76 ENOB (Bits) 12.1 SFDR (dB) 83 Operating temperature range (°C) -40 to 85 Input buffer No
LQFP (PM) 64 144 mm² 12 x 12
  • HIGH DYNAMIC RANGE:
       High SFDR: 83dB at 10MHz fIN
       High SNR: 75dB at 10MHz fIN
  • ON-BOARD TRACK-AND-HOLD:
       Differential Inputs
       Selectable Full-Scale Input Range
  • LOW POWER: 850mW
  • FLEXIBLE CLOCKING:
       Differential or Single-Ended
       Accepts Sine or Square Wave Clocking Down to 0.5VPP
       Variable Threshold Level
  • APPLICATIONS
    • COMMUNICATIONS RECEIVERS
    • TEST INSTRUMENTATION
    • PROFESSIONAL CCD IMAGING

All trademarks are the property of their respective owners.
  • HIGH DYNAMIC RANGE:
       High SFDR: 83dB at 10MHz fIN
       High SNR: 75dB at 10MHz fIN
  • ON-BOARD TRACK-AND-HOLD:
       Differential Inputs
       Selectable Full-Scale Input Range
  • LOW POWER: 850mW
  • FLEXIBLE CLOCKING:
       Differential or Single-Ended
       Accepts Sine or Square Wave Clocking Down to 0.5VPP
       Variable Threshold Level
  • APPLICATIONS
    • COMMUNICATIONS RECEIVERS
    • TEST INSTRUMENTATION
    • PROFESSIONAL CCD IMAGING

All trademarks are the property of their respective owners.

The ADS5421 is a high-dynamic range 14-bit, 40MHz, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.

The ADS5421 has a 4VPP differential input range (2VPP • 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.

The ADS5421 is available in a small LQFP-64 package.

The ADS5421 is a high-dynamic range 14-bit, 40MHz, pipelined Analog-to-Digital Converter (ADC). It includes a high-bandwidth linear track-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The clock input can accept a low-level differential sine wave or square wave signal down to 0.5VPP, further improving the Signal-to-Noise Ratio (SNR) performance.

The ADS5421 has a 4VPP differential input range (2VPP • 2 inputs) for optimum Spurious-Free Dynamic Range (SFDR). The differential operation gives the lowest even-order harmonic components. A lower input voltage can also be selected using the internal references, further optimizing SFDR.

The ADS5421 is available in a small LQFP-64 package.
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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 14-Bit, 40MHz Sampling Analog-to-Digital Converter 数据表 (Rev. E) 2005年 6月 22日
应用手册 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015年 5月 22日
应用手册 Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013年 7月 19日
应用手册 High-Speed, Analog-to-Digital Converter Basics 2012年 1月 11日
应用手册 Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 2010年 9月 10日
应用手册 Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 2009年 4月 28日
应用手册 所选封装材料的热学和电学性质 2008年 10月 16日
应用手册 模数规格和性能特性术语表 (Rev. A) 最新英语版本 (Rev.B) 2008年 10月 16日
应用手册 高速数据转换 英语版 2008年 10月 16日
应用手册 CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008年 6月 8日
应用手册 Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008年 6月 2日

设计与开发

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计算工具

ADC-HARMONIC-CALC — ADC Frequency Calculator Download

    The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.

    Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)

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计算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)

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计算工具

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.

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设计工具

SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)

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模拟工具

PSPICE-FOR-TI — PSpice® for TI 设计和仿真工具

PSpice® for TI 可提供帮助评估模拟电路功能的设计和仿真环境。此功能齐全的设计和仿真套件使用 Cadence® 的模拟分析引擎。PSpice for TI 可免费使用，包括业内超大的模型库之一，涵盖我们的模拟和电源产品系列以及精选的模拟行为模型。

借助 PSpice for TI 的设计和仿真环境及其内置的模型库，您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案，然后再进行布局和制造，可缩短产品上市时间并降低开发成本。 

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LQFP (PM) 64 Ultra Librarian
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包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
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  • 封装厂地点

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