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The ADS5481/ADS5482/ADS5483 (ADS548x) is a 16-bit family of analog-to-digital converters (ADCs) that operate from both a 5-V supply and 3.3-V supply while providing LVDS-compatible digital outputs. The ADS548x integrated analog input buffer isolates the internal switching of the onboard track and hold (T&H) from disturbing the signal source while providing a high-impedance input. An internal reference generator is also provided to simplify the system design.
Designed for highest total ENOB, the ADS548x family has outstanding low noise performance and spurious-free dynamic range.
The ADS548x is available in an QFN-64 PowerPAD package. The device is built on Texas Instruments complementary bipolar process (BiCom3) and is specified over the full industrial temperature range (–40°C to +85°C).
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | 16-Bit, 80/105/135 MSPS High-Speed ADCs 数据表 (Rev. C) | 2009年 10月 6日 | |||
| 应用手册 | Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) | 2015年 5月 22日 | ||||
| 应用手册 | Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) | 2013年 7月 19日 | ||||
| 应用手册 | High-Speed, Analog-to-Digital Converter Basics | 2012年 1月 11日 | ||||
| 应用手册 | Input Impedance Measurement Using ADC FFT Data | 2011年 1月 11日 | ||||
| 应用手册 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010年 9月 10日 | ||||
| 应用手册 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009年 4月 28日 | ||||
| 应用手册 | 所选封装材料的热学和电学性质 | 2008年 10月 16日 | ||||
| 应用手册 | 模数规格和性能特性术语表 (Rev. A) | 最新英语版本 (Rev.B) | 2008年 10月 16日 | |||
| 应用手册 | 高速数据转换 | 英语版 | 2008年 10月 16日 | |||
| 应用手册 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008年 6月 8日 | ||||
| 应用手册 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008年 6月 2日 | ||||
| 应用手册 | QFN Layout Guidelines | 2006年 7月 28日 |
如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。
ADS5482EVM 是能让设计者评估德州仪器 (TI) ADS5482 器件的电路板，该器件是一款具有 DDR LVDS 输出的 16 位 105MSPS ADC。借助提供的逻辑分析器输出板，可以使用 Agilent E5405A 或 Tektronix P6980 非接触式探针直接采集 ADC LVDS 输出。ADS5482EVM 还与 TI 的 TSW1400EVM 或 TSW1405EVM 高速 LVDS 评估和采集系统兼容，允许采集样本并将其传递到 PC，以进行快速分析和评估。
ADS5482EVM 还包括德州仪器 (TI) 的新款 10 路输出低抖动时钟同步器和抖动消除器器件 - (...)
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
The ADC Harmonic Calculation tool is an excel based calculator for determining the location in frequency space of high order harmonics following Nyquist aliasing in an analog to digital converter.
Given an ADC sample rate and the span of a signal of interest the calcultor will determine if the 2nd (...)
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| VQFN (RGC) | 64 | Ultra Librarian |
Analog Engineer's Calc Installer
General calculator tool for analog design support.
The design resource accessed as www.ti.com/lit/zip/slwc107 or www.ti.com/lit/xx/slwc107w/slwc107w.zip has been migrated to a new user experience at www.ti.com/tool/download/SLWC107. Please update any bookmarks accordingly.