The ADS901 is a high-speed pipelined analog-to-digital converter that operates from a +3V power supply. This complete converter includes a wide bandwidth track/hold and a 10-bit quantizer. The full scale input range is set by external references.
The ADS901 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. Its low distortion and high SNR give the extra margin needed for telecommunications, video and test instrumentation applications. The ADS901 is available in an SSOP-28 package.
| 顶层文档 | 类型 | 标题 | 格式选项 | 下载最新的英语版本 | 日期 | |
|---|---|---|---|---|---|---|
| * | 数据表 | ADS901: SpeedPlus? 10-Bit, 20MHz, +3V Supply Analog-To-Digital Converter 数据表 (Rev. A) | 2001年 2月 23日 | |||
| 应用手册 | Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) | 2010年 9月 10日 | ||||
| 应用手册 | Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio | 2009年 4月 28日 | ||||
| 应用手册 | 所选封装材料的热学和电学性质 | 2008年 10月 16日 | ||||
| 应用手册 | 模数规格和性能特性术语表 (Rev. A) | 最新英语版本 (Rev.B) | 2008年 10月 16日 | |||
| 应用手册 | 高速数据转换 | 英语版 | 2008年 10月 16日 | |||
| 应用手册 | CDCE62005 as Clock Solution for High-Speed ADCs | 2008年 9月 4日 | ||||
| 应用手册 | CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters | 2008年 6月 8日 | ||||
| 应用手册 | Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 | 2008年 6月 2日 |
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The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
| 封装 | 引脚 | CAD 符号、封装和 3D 模型 |
|---|---|---|
| SSOP (DB) | 28 | Ultra Librarian |
Analog Engineer's Calc Installer
General calculator tool for analog design support.