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数据转换器
模数转换器 (ADC)
高速 ADC (≥10 MSPS)

ADS5232

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双通道、12 位、65MSPS 模数转换器 (ADC)

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数据表

ADS5232

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产品详情

Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 2 Interface type Parallel CMOS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 335 Architecture Pipeline SNR (dB) 70.7 ENOB (Bits) 11.3 SFDR (dB) 86 Operating temperature range (°C) -40 to 85 Input buffer No
Sample rate (max) (Msps) 65 Resolution (Bits) 12 Number of input channels 2 Interface type Parallel CMOS Analog input BW (MHz) 300 Features Low Power Rating Catalog Peak-to-peak input voltage range (V) 2 Power consumption (typ) (mW) 335 Architecture Pipeline SNR (dB) 70.7 ENOB (Bits) 11.3 SFDR (dB) 86 Operating temperature range (°C) -40 to 85 Input buffer No
TQFP (PAG) 64 144 mm² (12 mm × 12 mm)
  • Single +3.3V Supply
  • High SNR: 70.7dBFS at fIN = 5MHz
  • Total Power Dissipation:
    Internal Reference: 371mW
    External Reference: 335mW
  • Internal or External Reference
  • Low DNL: ±0.3LSB
  • Flexible Input Range: 1.5VPP to 2VPP
  • TQFP-64 Package
  • APPLICATIONS
    • Communications IF Processing
    • Communications Base Stations
    • Test Equipment
    • Medical Imaging
    • Video Digitizing
    • CCD Digitizing

All trademarks are the property of their respective owners.
  • Single +3.3V Supply
  • High SNR: 70.7dBFS at fIN = 5MHz
  • Total Power Dissipation:
    Internal Reference: 371mW
    External Reference: 335mW
  • Internal or External Reference
  • Low DNL: ±0.3LSB
  • Flexible Input Range: 1.5VPP to 2VPP
  • TQFP-64 Package
  • APPLICATIONS
    • Communications IF Processing
    • Communications Base Stations
    • Test Equipment
    • Medical Imaging
    • Video Digitizing
    • CCD Digitizing

All trademarks are the property of their respective owners.

The ADS5232 is a dual, high-speed, high dynamic range, 12-bit pipelined analog-to-digital converter (ADC). This converter includes a high-bandwidth sample-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The differential nature of the sample-and-hold amplifier and ADC circuitry minimizes even-order harmonics and gives excellent common-mode noise immunity.

The ADS5232 provides for setting the full-scale range of the converter without any external reference circuitry. The internal reference can be disabled, allowing low-drive, external references to be used for improved tracking in multichannel systems.

The ADS5232 provides an over-range indicator flag to indicate an input signal that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of front-end gain control circuitry. There is also an output enable pin to allow for multiplexing and testing on a PC board.

The ADS5232 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. The ADS5232 is available in a TQFP-64 package.

The ADS5232 is a dual, high-speed, high dynamic range, 12-bit pipelined analog-to-digital converter (ADC). This converter includes a high-bandwidth sample-and-hold amplifier that gives excellent spurious performance up to and beyond the Nyquist rate. The differential nature of the sample-and-hold amplifier and ADC circuitry minimizes even-order harmonics and gives excellent common-mode noise immunity.

The ADS5232 provides for setting the full-scale range of the converter without any external reference circuitry. The internal reference can be disabled, allowing low-drive, external references to be used for improved tracking in multichannel systems.

The ADS5232 provides an over-range indicator flag to indicate an input signal that exceeds the full-scale input range of the converter. This flag can be used to reduce the gain of front-end gain control circuitry. There is also an output enable pin to allow for multiplexing and testing on a PC board.

The ADS5232 employs digital error correction techniques to provide excellent differential linearity for demanding imaging applications. The ADS5232 is available in a TQFP-64 package.
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技术文档

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顶层文档 类型 标题 格式选项 下载最新的英语版本 日期
* 数据表 Dual, 12-Bit, 65MSPS, +3.3V Analog-to-Digital Converter 数据表 (Rev. A) 2006-3-28
应用手册 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A) 2015-5-22
应用手册 Why Use Oversampling when Undersampling Can Do the Job? (Rev. A) 2013-7-19
应用手册 Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A) 2010-9-10
应用手册 Smart Selection of ADC/DAC Enables Better Design of Software-Defined Radio 2009-4-28
应用手册 CDCE62005 as Clock Solution for High-Speed ADCs 2008-9-4
应用手册 CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital Converters 2008-6-8
应用手册 Phase Noise Performance and Jitter Cleaning Ability of CDCE72010 2008-6-2

设计与开发

如需其他信息或资源，请点击以下任一标题进入详情页面查看（如有）。

计算工具

ADC-HARMONIC-CALC — ADC Frequency Calculator Download

    ADC 谐波计算工具是基于 excel 的计算器，用于确定当模数转换器中出现奈奎斯特混叠后高次谐波的频率空间的位置。

    如果给定 ADC 采样速率和有用信号的范围，该计算器可以确定第 2 至第 9 谐波是否会返送到有用信号的频带中。图表以图形方式显示了在出现奈奎斯特混叠后基本信号以及第 2 至第 9 谐波的位置。

支持的产品和硬件
计算工具

ANALOG-ENGINEER-CALC — PC software analog engineer's calculator

模拟工程师计算器旨在加快模拟电路设计工程师经常运用的许多重复性计算。该基于 PC 的工具提供图形界面，其中显示各种常见计算列表，从使用反馈电阻器设置运算放大器增益到选择合适的电路设计元件，以稳定模数转换器 (ADC) 驱动器缓冲器电路。

除了可用作独立工具之外，该计算器还能很好地与模拟工程师口袋参考中所述的概念配合使用。

支持的产品和硬件
计算工具

JITTER-SNR-CALC — Jitter and SNR calculator

JITTER-SNR-CALC 可用于根据输入频率和时钟抖动来计算 ADC 的理论信噪比 (SNR) 性能。

支持的产品和硬件
封装 引脚 CAD 符号、封装和 3D 模型
TQFP (PAG) 64 Ultra Librarian
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