SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Table 12-3242 lists some of the I/Os of the GPMC module.
Module Pin | I/O(1) | Description |
---|---|---|
GPMC0_FCLK | Internal | Functional clock. Acts as the time reference. |
GPMC0_ICLK | Internal | Interface clock. Acts as the time reference. |
GPMC0_CLKOUT | O | External clock provided to the external device for synchronous operations |
GPMC0_A[21-16] | O | Address |
GPMC0_AD[15-0] | I/O | Data-multiplexed with addresses A[16-1] on memory side |
GPMC0_CSn[3-0] | O | Chip-selects |
GPMC0_ADVn_ALE | O | Address valid enable |
GPMC0_OEn_REn | O | Output enable (read access only) |
GPMC0_WEn | O | Write enable (write access only) |
GPMC0_WAIT[1-0] | I | Ready signal from memory device. Indicates when valid burst data is ready to be read |
Figure 12-1652 shows the typical connection between the GPMC module and an attached NOR Flash memory.
The following sections demonstrate how to calculate GPMC parameters for three access types: