SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
The PRU_ICSSG supports a scratch pad with up to four independent banks accessible by the PRU cores and two independent banks accessible by the RTU_PRU cores. The TX_PRU cores have a separate scratch pad memory with two independent banks. The PRU, RTU_PRU and TX_PRU cores interact with the scratch pad through broadside load/store PRU interface and XFR instructions. The scratch pad can be used as a temporary place holder for the register contents of the PRU, RTU_PRU or TX_PRU cores.