SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Table 12-3361 lists the memory-mapped registers for the ELM. All register offset addresses not listed in Table 12-3361 should be considered as reserved locations and the register contents should not be modified.
Instance | Base Address |
---|---|
ELM0 | 2501 0000h |
Offset | Acronym | Register Name | ELM0 Physical Address |
---|---|---|---|
0h | ELM_REVISION | IP revision | 2501 0000h |
10h | ELM_SYSCONFIG | Module software reset and local power management register | 2501 0010h |
14h | ELM_SYSSTATUS | Internal reset monitoring | 2501 0014h |
18h | ELM_IRQSTATUS | Interrupt status register | 2501 0018h |
1Ch | ELM_IRQENABLE | Interrupt enable register | 2501 001Ch |
20h | ELM_LOCATION_CONFIG | ECC algorithm parameters | 2501 0020h |
80h | ELM_PAGE_CTRL | Page definition | 2501 0080h |
400h + formula | ELM_SYNDROME_FRAGMENT_0_i | Input syndrome polynomial bits 0 to 31 | 2501 0400h + formula |
404h + formula | ELM_SYNDROME_FRAGMENT_1_i | Input syndrome polynomial bits 32 to 63 | 2501 0404h + formula |
408h + formula | ELM_SYNDROME_FRAGMENT_2_i | Input syndrome polynomial bits 64 to 95 | 2501 0408h + formula |
40Ch + formula | ELM_SYNDROME_FRAGMENT_3_i | Input syndrome polynomial bits 96 to 127 | 2501 040Ch + formula |
410h + formula | ELM_SYNDROME_FRAGMENT_4_i | Input syndrome polynomial bits 128 to 159 | 2501 0410h + formula |
414h + formula | ELM_SYNDROME_FRAGMENT_5_i | Input syndrome polynomial bits 160 to 191 | 2501 0414h + formula |
418h + formula | ELM_SYNDROME_FRAGMENT_6_i | Input syndrome polynomial bits 192 to 207 | 2501 0418h + formula |
800h + formula | ELM_LOCATION_STATUS_i | Exit status for the syndrome polynomial processing | 2501 0800h + formula |
880h + formula | ELM_ERROR_LOCATION_0_i | Error-location register 0 | 2501 0880h + formula |
884h + formula | ELM_ERROR_LOCATION_1_i | Error-location register 1 | 2501 0884h + formula |
888h + formula | ELM_ERROR_LOCATION_2_i | Error-location register 2 | 2501 0888h + formula |
88Ch + formula | ELM_ERROR_LOCATION_3_i | Error-location register 3 | 2501 088Ch + formula |
890h + formula | ELM_ERROR_LOCATION_4_i | Error-location register 4 | 2501 0890h + formula |
894h + formula | ELM_ERROR_LOCATION_5_i | Error-location register 5 | 2501 0894h + formula |
898h + formula | ELM_ERROR_LOCATION_6_i | Error-location register 6 | 2501 0898h + formula |
89Ch + formula | ELM_ERROR_LOCATION_7_i | Error-location register 7 | 2501 089Ch + formula |
8A0h + formula | ELM_ERROR_LOCATION_8_i | Error-location register 8 | 2501 08A0h + formula |
8A4h + formula | ELM_ERROR_LOCATION_9_i | Error-location register 9 | 2501 08A4h + formula |
8A8h + formula | ELM_ERROR_LOCATION_10_i | Error-location register 10 | 2501 08A8h + formula |
8ACh + formula | ELM_ERROR_LOCATION_11_i | Error-location register 11 | 2501 08ACh + formula |
8B0h + formula | ELM_ERROR_LOCATION_12_i | Error-location register 12 | 2501 08B0h + formula |
8B4h + formula | ELM_ERROR_LOCATION_13_i | Error-location register 13 | 2501 08B4h + formula |
8B8h + formula | ELM_ERROR_LOCATION_14_i | Error-location register 14 | 2501 08B8h + formula |
8BCh + formula | ELM_ERROR_LOCATION_15_i | Error-location register 15 | 2501 08BCh + formula |
ELM_REVISION is shown in Figure 12-1699 and described in Table 12-3363.
This register contains the IP revision code.
(A write to or reset of this register has no effect.)
Instance | Physical Address |
---|---|
ELM0 | 2501 0000h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
REVISION | |||||||||||||||||||||||||||||||
R-20h | |||||||||||||||||||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | REVISION | R | 20h | TI internal data. Identifies revision of peripheral. |
ELM_SYSCONFIG is shown in Figure 12-1700 and described in Table 12-3365.
This register controls ELM local power management and software reset.
Some of the ELM features described in this section may not be supported on this family of devices. For more information, see ELM Not Supported Features.
Instance | Physical Address |
---|---|
ELM0 | 2501 0010h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | CLOCKACTIVITYOCP | ||||||
R-0h | R/W-0h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | SIDLEMODE | RESERVED | SOFTRESET | AUTOGATING | |||
R-0h | R/W-2h | R-0h | R/W-0h | R/W-1h | |||
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-9 | RESERVED | R | 0h | Reserved |
8 | CLOCKACTIVITYOCP | R/W | 0h | ELM_FICLK activity when module is in IDLE mode 0h (R/W) = ELM_FICLK can be switched off. 1h (R/W) = ELM_FICLK is maintained. |
7-5 | RESERVED | R | 0h | Reserved |
4-3 | SIDLEMODE | R/W | 2h | Slave interface power management (clock stop req/ack control) 0h (R/W) = Force-idle. A clock stop request is acknowledged unconditionally and immediately 1h (R/W) = No-idle. A clock stop request is never acknowledged. 2h (R/W) = Smart-idle. The acknowledgment to a clock stop request is given based on the internal activity. 3h (R/W) = Reserved — do not use |
2 | RESERVED | R | 0h | Reserved |
1 | SOFTRESET | R/W | 0h | Module software reset 0h (R/W) = Normal mode 1h (R/W) = Start soft reset sequence. |
0 | AUTOGATING | R/W | 1h | Internal ELM_FICLK gating strategy 0h (R/W) = ELM_FICLK is free-running. 1h (R/W) = Automatic internal ELM_FICLK gating strategy is applied based on the Interconnect interface activity. |
ELM_SYSSTATUS is shown in Figure 12-1701 and described in Table 12-3367.
Internal reset monitoring
Undefined since:
From hardware perspective, the reset state is 0.
From software user perspective, when the accessible module is 1.
Instance | Physical Address |
---|---|
ELM0 | 2501 0014h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | RESETDONE | ||||||
R-0h | R-0h | ||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-1 | RESERVED | R | 0h | Reserved |
0 | RESETDONE | R | 0h | Internal reset monitoring 0h (R) = Reset is ongoing. 1h (R) = Reset is done (completed). |
ELM_IRQSTATUS is shown in Figure 12-1702 and described in Table 12-3369.
Interrupt status. This register doubles as a status register for the error-location processes.
Instance | Physical Address |
---|---|
ELM0 | 2501 0018h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | PAGE_VALID | ||||||
R-0h | R/W1C-0h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LOC_VALID_7 | LOC_VALID_6 | LOC_VALID_5 | LOC_VALID_4 | LOC_VALID_3 | LOC_VALID_2 | LOC_VALID_1 | LOC_VALID_0 |
R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h | R/W1C-0h |
LEGEND: R = Read Only; R/W1C = Read/Write 1 to Clear Bit; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-9 | RESERVED | R | 0h | Reserved |
8 | PAGE_VALID | R/W1C | 0h | Error-location status for a full page, based on the mask definition |
7 | LOC_VALID_7 | R/W1C | 0h | Error-location status for syndrome polynomial 7 |
6 | LOC_VALID_6 | R/W1C | 0h | Error-location status for syndrome polynomial 6 |
5 | LOC_VALID_5 | R/W1C | 0h | Error-location status for syndrome polynomial 5 |
4 | LOC_VALID_4 | R/W1C | 0h | Error-location status for syndrome polynomial 4 |
3 | LOC_VALID_3 | R/W1C | 0h | Error-location status for syndrome polynomial 3 |
2 | LOC_VALID_2 | R/W1C | 0h | Error-location status for syndrome polynomial 2 |
1 | LOC_VALID_1 | R/W1C | 0h | Error-location status for syndrome polynomial 1 |
0 | LOC_VALID_0 | R/W1C | 0h | Error-location status for syndrome polynomial 0 |
ELM_IRQENABLE is shown in Figure 12-1703 and described in Table 12-3371.
Interrupt enable.
Instance | Physical Address |
---|---|
ELM0 | 2501 001Ch |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | PAGE_MASK | ||||||
R-0h | R/W-0h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
LOCATION_MASK_7 | LOCATION_MASK_6 | LOCATION_MASK_5 | LOCATION_MASK_4 | LOCATION_MASK_3 | LOCATION_MASK_2 | LOCATION_MASK_1 | LOCATION_MASK_0 |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-9 | RESERVED | R | 0h | Reserved |
8 | PAGE_MASK | R/W | 0h | Page interrupt mask bit |
7 | LOCATION_MASK_7 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 7 |
6 | LOCATION_MASK_6 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 6 |
5 | LOCATION_MASK_5 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 5 |
4 | LOCATION_MASK_4 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 4 |
3 | LOCATION_MASK_3 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 3 |
2 | LOCATION_MASK_2 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 2 |
1 | LOCATION_MASK_1 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 1 |
0 | LOCATION_MASK_0 | R/W | 0h | Error-location interrupt mask bit for syndrome polynomial 0 |
ELM_LOCATION_CONFIG is shown in Figure 12-1704 and described in Table 12-3373.
ECC algorithm parameters.
Instance | Physical Address |
---|---|
ELM0 | 2501 0020h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | ECC_SIZE | ||||||
R-0h | R/W-0h | ||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
ECC_SIZE | |||||||
R/W-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_BCH_LEVEL | ||||||
R-0h | R/W-0h | ||||||
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-27 | RESERVED | R | 0h | Reserved |
26-16 | ECC_SIZE | R/W | 0h | Maximum size of the buffers for which the error-location engine is used, in number of nibbles (4-bit entities) |
15-2 | RESERVED | R | 0h | Reserved |
1-0 | ECC_BCH_LEVEL | R/W | 0h | Error correction level |
ELM_PAGE_CTRL is shown in Figure 12-1705 and described in Table 12-3375.
Page definition.
Instance | Physical Address |
---|---|
ELM0 | 2501 0080h |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SECTOR_7 | SECTOR_6 | SECTOR_5 | SECTOR_4 | SECTOR_3 | SECTOR_2 | SECTOR_1 | SECTOR_0 |
R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h | R/W-0h |
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-8 | RESERVED | R | 0h | Reserved |
7 | SECTOR_7 | R/W | 0h | Set to 1 if syndrome polynomial 7 is part of the page in page mode. Must be 0 in continuous mode. |
6 | SECTOR_6 | R/W | 0h | Set to 1 if syndrome polynomial 6 is part of the page in page mode. Must be 0 in continuous mode. |
5 | SECTOR_5 | R/W | 0h | Set to 1 if syndrome polynomial 5 is part of the page in page mode. Must be 0 in continuous mode. |
4 | SECTOR_4 | R/W | 0h | Set to 1 if syndrome polynomial 4 is part of the page in page mode. Must be 0 in continuous mode. |
3 | SECTOR_3 | R/W | 0h | Set to 1 if syndrome polynomial 3 is part of the page in page mode. Must be 0 in continuous mode. |
2 | SECTOR_2 | R/W | 0h | Set to 1 if syndrome polynomial 2 is part of the page in page mode. Must be 0 in continuous mode. |
1 | SECTOR_1 | R/W | 0h | Set to 1 if syndrome polynomial 1 is part of the page in page mode. Must be 0 in continuous mode. |
0 | SECTOR_0 | R/W | 0h | Set to 1 if syndrome polynomial 0 is part of the page in page mode. Must be 0 in continuous mode. |
ELM_SYNDROME_FRAGMENT_0_i (where i = 0 to 7) is shown in Figure 12-1706 and described in Table 12-3377.
Input syndrome polynomial bits 0 to 31.
Offset = 400h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0400h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_0 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_0 | R/W | 0h | Syndrome bits 0 to 31 |
ELM_SYNDROME_FRAGMENT_1_i (where i = 0 to 7) is shown in Figure 12-1707 and described in Table 12-3379.
Input syndrome polynomial bits 32 to 63.
Offset = 404h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0404h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_1 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_1 | R/W | 0h | Syndrome bits 32 to 63 |
ELM_SYNDROME_FRAGMENT_2_i (where i = 0 to 7) is shown in Figure 12-1708 and described in Table 12-3381.
Input syndrome polynomial bits 64 to 95.
Offset = 408h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0408h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_2 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_2 | R/W | 0h | Syndrome bits 64 to 95 |
ELM_SYNDROME_FRAGMENT_3_i (where i = 0 to 7) is shown in Figure 12-1709 and described in Table 12-3383.
Input syndrome polynomial bits 96 to 127.
Offset = 40Ch + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 040Ch + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_3 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_3 | R/W | 0h | Syndrome bits 96 to 127 |
ELM_SYNDROME_FRAGMENT_4_i (where i = 0 to 7) is shown in Figure 12-1710 and described in Table 12-3385.
Input syndrome polynomial bits 128 to 159.
Offset = 410h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0410h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_4 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_4 | R/W | 0h | Syndrome bits 128 to 159 |
ELM_SYNDROME_FRAGMENT_5_i (where i = 0 to 7) is shown in Figure 12-1711 and described in Table 12-3387.
Input syndrome polynomial bits 160 to 191.
Offset = 414h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0414h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_5 | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | SYNDROME_5 | R/W | 0h | Syndrome bits 160 to 191 |
ELM_SYNDROME_FRAGMENT_6_i (where i = 0 to 7) is shown in Figure 12-1712 and described in Table 12-3389.
Input syndrome polynomial bits 192 to 207.
Offset = 418h + (i * 40h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0418h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | SYNDROME_VALID | ||||||
R-0h | R/W-0h | ||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
SYNDROME_6 | |||||||
R/W-0h | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SYNDROME_6 | |||||||
R/W-0h | |||||||
LEGEND: R = Read Only; R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-17 | RESERVED | R | 0h | Reserved |
16 | SYNDROME_VALID | R/W | 0h | Syndrome valid bit |
15-0 | SYNDROME_6 | R/W | 0h | Syndrome bits 192 to 207 |
ELM_LOCATION_STATUS_i (where i = 0 to 7) is shown in Figure 12-1713 and described in Table 12-3391.
Exit status for the syndrome polynomial processing.
Offset = 800h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0800h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0h | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0h | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | ECC_CORRECTABLE | ||||||
R-0h | R-0h | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_NB_ERRORS | ||||||
R-0h | R-0h | ||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-9 | RESERVED | R | 0h | Reserved |
8 | ECC_CORRECTABLE | R | 0h | Error-location process exit status |
7-5 | RESERVED | R | 0h | Reserved |
4-0 | ECC_NB_ERRORS | R | 0h | Number of errors detected and located |
ELM_ERROR_LOCATION_0_i (where i = 0 to 7) is shown in Figure 12-1714 and described in Table 12-3393.
Error-location register 0.
Offset = 880h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0880h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_1_i (where i = 0 to 7) is shown in Figure 12-1715 and described in Table 12-3395.
Error-location register 1.
Offset = 884h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0884h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_2_i (where i = 0 to 7) is shown in Figure 12-1716 and described in Table 12-3397.
Error-location register 2.
Offset = 888h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0888h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_3_i (where i = 0 to 7) is shown in Figure 12-1717 and described in Table 12-3399.
Error-location register 3.
Offset = 88Ch + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 088Ch + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_4_i (where i = 0 to 7) is shown in Figure 12-1718 and described in Table 12-3401.
Error-location register 4.
Offset = 890h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0890h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_5_i (where i = 0 to 7) is shown in Figure 12-1719 and described in Table 12-3403.
Error-location register 5.
Offset = 894h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0894h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_6_i (where i = 0 to 7) is shown in Figure 12-1720 and described in Table 12-3405.
Error-location register 6.
Offset = 898h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 0898h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_7_i (where i = 0 to 7) is shown in Figure 12-1721 and described in Table 12-3407.
Error-location register 7.
Offset = 89Ch + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 089Ch + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_8_i (where i = 0 to 7) is shown in Figure 12-1722 and described in Table 12-3409.
Error-location register 8.
Offset = 8A0h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 08A0h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_9_i (where i = 0 to 7) is shown in Figure 12-1723 and described in Table 12-3411.
Error-location register 9.
Offset = 8A4h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 08A4h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_10_i (where i = 0 to 7) is shown in Figure 12-1724 and described in Table 12-3413.
Error-location register 10.
Offset = 8A8h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 08A8h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_11_i (where i = 0 to 7) is shown in Figure 12-1725 and described in Table 12-3415.
Error-location register 11.
Offset = 8ACh + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 08ACh + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_12_i (where i = 0 to 7) is shown in Figure 12-1726 and described in Table 12-3417.
Error-location register 12.
Offset = 8B0h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 08B0h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_13_i (where i = 0 to 7) is shown in Figure 12-1727 and described in Table 12-3419.
Error-location register 13.
Offset = 8B4h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 08B4h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_14_i (where i = 0 to 7) is shown in Figure 12-1728 and described in Table 12-3421.
Error-location register 14.
Offset = 8B8h + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 08B8h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |
ELM_ERROR_LOCATION_15_i (where i = 0 to 7) is shown in Figure 12-1729 and described in Table 12-3423.
Error-location register 15.
Offset = 8BCh + (i * 100h), where: i = 0 to 7
Instance | Physical Address |
---|---|
ELM0 | 2501 08BCh + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||||||||||
R-0h | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RESERVED | ECC_ERROR_LOCATION | ||||||||||||||
R-0h | R-0h | ||||||||||||||
LEGEND: R = Read Only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-13 | RESERVED | R | 0h | Reserved |
12-0 | ECC_ERROR_LOCATION | R | 0h | Error-location bit address |