SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
This section identifies the requirements for initializing the surrounding modules when the module is to be used for the first time after a device reset.
Surrounding Modules | Comments |
---|---|
LPSC7 | Module reset must be enabled. For more information about the module configuration, see Reset. |
PLLCTRL0 | PLLCTRL0 configuration must be done to enable the clocks to the ADC module, see Clocking. |
HFOSC0 | HFOSC0 configuration must be done to enable the clocks to the ADC module, see Clocking. |
PLL1 | PLL1 configuration must be done to enable the clocks to the ADC module, see Clocking. |
PLL2 | PLL2 configuration must be done to enable the clocks to the ADC module, see Clocking. |
COMPUTE_CLUSTER0 | Device INTCs must be configured to enable the interrupt request generation. For information about enabling COMPUTE_CLUSTER0 interrupts, see Interrupts. |
R5FSS0_CORE0/1 | Device INTCs must be configured to enable the interrupt request generation. For information about enabling R5FSS0_CORE0/1 interrupts, see Interrupts. |
R5FSS1_CORE0/1 | Device INTCs must be configured to enable the interrupt request generation. For information about enabling R5FSS1_CORE0/1 interrupts, see Interrupts. |
PRU_ICSSG0/1 | Device INTCs must be configured to enable the interrupt request generation. For information about enabling PRU_ICSSG0 interrupts, see Interrupts. |
ESM0 | Device INTCs must be configured to enable the interrupt request generation. For information about enabling ESM0 interrupts, see Interrupts. |
PDMA_ADC_0 | PDMA_ADC_0 controllers configuration must be done to enable the module PDMA_ADC_0 input request, see Data Movement Architecture (DMA). |
Interconnect | For information about the CBASS0 interconnect configuration, see System Interconnect. |