SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Table 6-1768 lists the PRU_ICSSG_PA_STAT_QSTAT registers. All register offset addresses not listed in Table 6-1768 should be considered as reserved locations and the register contents should not be modified.
Statics query mode RAM stores statistic values
Instance | Base Address |
---|---|
PRU_ICSSG0_PA_STAT_WRAP_PA_SLV_QSTAT | 3002 7000h |
PRU_ICSSG1_PA_STAT_WRAP_PA_SLV_QSTAT | 300A 7000h |
Offset | Acronym | Register Name | PRU_ICSSG0_PA_STAT_WRAP_PA_SLV_QSTAT Physical Address |
PRU_ICSSG1_PA_STAT_WRAP_PA_SLV_QSTAT Physical Address |
---|---|---|---|---|
0h + formula | ICSSG_PA_STAT_QRAM_n | 32-bit Statistics (Query Mode) | 3002 7000h + formula | 300A 7000h + formula |
ICSSG_PA_STAT_QRAM_n is shown in Figure 6-887 and described in Table 6-1770.
Return to the Summary Table.
Query mode RAM.
Reading directly to a particular statistics memory address returns the current statistics values. In query mode, the stats are not reset after the read completes. To accommodate debug, setting a counter value in the stats memory via the register write is also allowed. However, if there is a stat bump and a register write on the same stat that occur simultaneously, the value in the register write may be ignored.
"n" is the number of 32-bit stats that are supported in the module.
Offset = 0h + (n * 4h); where n = 0h to 3FFh
Instance | Physical Address |
---|---|
PRU_ICSSG0_PA_STAT_WRAP_PA_SLV_QSTAT | 3002 7000h + formula |
PRU_ICSSG1_PA_STAT_WRAP_PA_SLV_QSTAT | 300A 7000h + formula |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
VALUE | |||||||||||||||||||||||||||||||
R/W-0h | |||||||||||||||||||||||||||||||
LEGEND: R/W = Read/Write; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-0 | VALUE | R/W | 0h | Query statistic. 32-bit statistic value at counter "n". |