SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
The XFRDMA block has two temporay FIFOs that store the data during the translation, one for transmit and one for receive. Each FIFO has a configurable number of data phases of storage per configured thread. Each FIFO can be accessed independently, and by both the XFR and PSI-L in the same cycle to maintain full bandwidth. For transmit the FIFO holds and packs the XOUT data until it can be sent on the PSI-L bus. For receive the FIFO holds the PSI-L data until it can be unpacked to the XIN data. A transmit FIFO that has a full data phase available or has reached the end of data for that data type is ready to transmit on the PSI-L bus. A receive FIFO that has a full data phase available or has reached the end of data for that data type is ready to receive on an XIN.