SPRUIM2H May 2020 – October 2023 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
Each RAM bank of the FDB module supports 2 modes of operation:
The FDB block consist of 2 physical banks of RAM, each of 8KB size. The PRU core will always have the ability to read/write the broadside RAM in FDB LUT mode. If FDB LUT mode is disabled then 8KB of the broadside RAM will operate in Generic mode and General purpose compare mode. Table 6-442 shows the valid mode configurations for each FDB physical bank.
Config1 | FDB Bank0: FDB LUT mode enabled FDB Bank1: FDB LUT mode enabled | The FDB LUT uses the full 16KB memory for the operation. PRU core will write to the RAM entry to learn if the packet miss |
Config2 | FDB Bank0: FDB LUT mode enabled FDB Bank1: FDB LUT mode disabled | The FDB LUT uses the first bank only (Bank0), or 8KB of memory The second memory bank (Bank1) is disabled for LUT operation. Bank1 is used for general purpose compare mode. |
Config3 | FDB Bank0: FDB LUT mode disabled FDB Bank1: FDB LUT mode disabled | Bank0 and Bank1 are 16KB RAM and it is used in general purpose compare mode. No FDB LUT events. |
In all configurations only one of the PRU cores (PRU0 or PRU1) can access the FDB RAM. It is not legal to have PRU0 access at the same time when PRU1 core access the FDB RAM. This is valid for all modes of operation.