SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
QEP Interrupt Flag .
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| Instance Name | Physical Address |
|---|---|
| EQEP0 | 5027 0032h |
| EQEP1 | 5027 1032h |
| EQEP2 | 5027 2032h |
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_1 | QMAE | UTO | IEL | SEL | PCM | ||
| R | R | R | R | R | R | ||
| 0h | 0h | 0h | 0h | 0h | 0h | ||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PCR | PCO | PCU | WTO | QDC | PHE | PCE | INT |
| R | R | R | R | R | R | R | R |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15:13 | RESERVED_1 | R | 0h | Reserved |
| 12 | QMAE | R | 0h | QMA Error interrupt flag 1 Interrupt was generated 0 No interrupt generated |
| 11 | UTO | R | 0h | Unit time out interrupt flag 1 Set by eQEP unit timer period match 0 No interrupt generated |
| 10 | IEL | R | 0h | Index event latch interrupt flag 1 This bit is set after latching the QPOSCNT
to QPOSILAT
0 No interrupt generated |
| 9 | SEL | R | 0h | Strobe event latch interrupt flag 1 This bit is set after latching the QPOSCNT
to QPOSSLAT
0 No interrupt generated |
| 8 | PCM | R | 0h | EQEP compare match event interrupt flag 1 This bit is set on position-compare match 0 No interrupt generated |
| 7 | PCR | R | 0h | Position-compare ready interrupt flag 1 This bit is set after transferring the
shadow register value to the active
position compare register
0 No interrupt generated |
| 6 | PCO | R | 0h | Position counter overflow interrupt flag 1 This bit is set on position counter
overflow.
0 No interrupt generated |
| 5 | PCU | R | 0h | Position counter underflow interrupt flag 1 This bit is set on position counter
underflow.
0 No interrupt generated |
| 4 | WTO | R | 0h | Watchdog timeout interrupt flag 1 Set by watchdog timeout 0 No interrupt generated |
| 3 | QDC | R | 0h | Quadrature direction change interrupt flag 1 Interrupt was generated 0 No interrupt generated |
| 2 | PHE | R | 0h | Quadrature phase error interrupt flag 1 Set on simultaneous transition of QEPA and
QEPB
0 No interrupt generated |
| 1 | PCE | R | 0h | Position counter error interrupt flag 1 Position counter error 0 No interrupt generated |
| 0 | INT | R | 0h | Global interrupt status flag 1 Interrupt was generated 0 No interrupt generated |