SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Capture Free Running Counter 0 current value of free running counter 0 on external event.
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| Instance Name | Physical Address |
|---|---|
| WDT0 | 5210 0020h |
| WDT1 | 5210 1020h |
| WDT2 | 5210 2020h |
| WDT3 | 5210 3020h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| CAFRC0 | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| CAFRC0 | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| CAFRC0 | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CAFRC0 | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:0 | CAFRC0 | R/W | 0h | CAFRC0: Capture Free Running Counter 0. This registers captures the current value of the Free Running Counter 0 when a event occurs, controlled by the external capture control block. User and privilege mode [read]: value of Free Running Counter 0 on a capture event |