SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
The LINID register contains the identification fields for LIN communication.
NOTE: For software compatibility with future LIN modules, the HGEN CTRL bit must be set to 1, the RX ID MASK field must be set to FFh, and the TX ID MASK field must be set to FFh.
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| Instance Name | Physical Address |
|---|---|
| LIN0 | 5240 0070h |
| LIN1 | 5240 1070h |
| LIN2 | 5240 2070h |
| LIN3 | 5240 3070h |
| LIN4 | 5240 4070h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RECEIVEDID | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| IDSLAVETASKBYTE | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| IDBYTE | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:24 | RESERVED_1 | R | 0h | Reserved |
| 23:16 | RECEIVEDID | R | 0h | Received ID. This bit is effective in LIN mode only. This byte contains the current message identifier. During header reception the received ID is copied from the SCIRXSHF register to this byte if there is no ID-parity error and there has been an RX/TX match. Note: If a framing error [FE] is detected during ID reception, the received ID will also not be copied to the LINID register. |
| 15:8 | IDSLAVETASKBYTE | R/W | 0h | ID Target Task byte. This field is effective in LIN mode only. This byte contains the identifier to which the received ID of an incoming header will be compared in order to decide whether a RX response, a TX response, or no action needs to be done by the LIN node. These bits are writable in LIN mode only. |
| 7:0 | IDBYTE | R/W | 0h | ID byte. This field is effective in LIN mode only. This byte is the LIN mode message ID. On a master node, a write to this register by the CPU initiates a header transmission. For a target task, this byte is used for message filtering when HGENCTRL [SCIGCR1.12] is '0'. These bits are writable in LIN mode only. |