SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
Enhanced Control register.
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| Instance Name | Physical Address |
|---|---|
| UART0 | 5230 0090h |
| UART1 | 5230 1090h |
| UART2 | 5230 2090h |
| UART3 | 5230 3090h |
| UART4 | 5230 4090h |
| UART5 | 5230 5090h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | CLEAR_TX_PE | TX_EN | RX_EN | TX_RST | RX_RST | A_MULTIDROP | |
| R | W | R/W | R/W | W | W | W | |
| 0h | 0h | 1h | 1h | 0h | 0h | 0h | |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:8 | RESERVED1 | R | 0h | |
| 7:6 | RESERVED | R | 0h | |
| 5 | CLEAR_TX_PE | W | 0h | Write 1 to clear parity error from the Transmitter to allow it to continue to try sending data [ISO7816 transmit only] |
| 4 | TX_EN | R/W | 1h | Enables/Disables the transmitter 1 Transmitter is working 0 Transmitter is shut down |
| 3 | RX_EN | R/W | 1h | Enables/Disables the receiver 1 Receiver is operating 0 Receiver is shut down |
| 2 | TX_RST | W | 0h | Writing '1' resets the transmitter |
| 1 | RX_RST | W | 0h | Writing '1' resets the receiver |
| 0 | A_MULTIDROP | W | 0h | In multi-drop mode, when written with the value '1' causes the next byte written into THR to be transmitted with the parity bit set, signaling an address |