SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
ADC Linearity Trim 4 Register.
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| Instance Name | Physical Address |
|---|---|
| ADC0_G0_G5 | 502C 00ECh |
| ADC1_G0_G5 | 502C 10ECh |
| ADC2_G0_G5 | 502C 20ECh |
| ADC3_G0_G5 | 502C 30ECh |
| ADC4_G0_G5 | 502C 40ECh |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| INLTRIM127TO96 | |||||||
| R/W | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| INLTRIM127TO96 | |||||||
| R/W | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| INLTRIM127TO96 | |||||||
| R/W | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| INLTRIM127TO96 | |||||||
| R/W | |||||||
| 0h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:0 | INLTRIM127TO96 | R/W | 0h | ADC Linearity Trim Bits 127-96. This register should not be modified unless specifically indicated by TI Errata or other documentation. Modifying the contents of this register could cause this module to operate outside of datasheet specifications. |