SPRUJ42 User guide | 德州仪器 TI.com.cn

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

25.2.31.1 WDT_RTIWDKEY Register (Offset = 9Ch) [reset = 0h]

Watchdog Key correct written key values discharge the external capacitor.

Table 5-2465 Instance Table

Figure 5-1212 WDT_RTIWDKEY Name Register

Table 5-2466 WDT_RTIWDKEY Register Field Descriptions

Bit	Field	Type	Reset	Description
31:16	RESERVED19	R/W	0h	Reserved. Reads return 0 and writes have no effect
15:0	WDKEY	R/W	0h	WDKEY: Watchdog Key. User and privilege mode reads are indeterminate. Privilege mode [write]: A write of 0xE51A followed by 0xA35C in two separate write operations defines the Key Sequence and discharges the watchdog capacitor. This also causes the upper 12 bits of the DWD down counter to be reloaded with the contents of the DWD preload register and the lower 13 bits to become all 1s. Writing any other value causes a digital watchdog reset, as shown in Table 1-3. Note: Register write access time precaution The user has to take into account that the write to the register takes 3 VCLK cycle. This needs to be considered for the AWD/DWD expiration calculation.