SPRUJ42 User guide | 德州仪器 TI.com.cn

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

4.2.2.54 ICSSM_PR1_ICSS_INTC_INTC_SLV_RAW_STATUS_REG1 Register

2.2.54.1 ICSSM_PR1_ICSS_INTC_INTC_SLV_RAW_STATUS_REG1 Register (Offset = 204h) [reset = 0h]

Raw Status Register 1

Table 4-529 Instance Table

Instance Name	Physical Address
ICSSM0	4802 0204h

Figure 4-248 ICSSM_PR1_ICSS_INTC_INTC_SLV_RAW_STATUS_REG1 Name Register

31	30	29	28	27	26	25	24
RAW_STATUS_63	RAW_STATUS_62	RAW_STATUS_61	RAW_STATUS_60	RAW_STATUS_59	RAW_STATUS_58	RAW_STATUS_57	RAW_STATUS_56
W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS
0h	0h	0h	0h	0h	0h	0h	0h
23	22	21	20	19	18	17	16
RAW_STATUS_55	RAW_STATUS_54	RAW_STATUS_53	RAW_STATUS_52	RAW_STATUS_51	RAW_STATUS_50	RAW_STATUS_49	RAW_STATUS_48
W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS
0h	0h	0h	0h	0h	0h	0h	0h
15	14	13	12	11	10	9	8
RAW_STATUS_47	RAW_STATUS_46	RAW_STATUS_45	RAW_STATUS_44	RAW_STATUS_43	RAW_STATUS_42	RAW_STATUS_41	RAW_STATUS_40
W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS
0h	0h	0h	0h	0h	0h	0h	0h
7	6	5	4	3	2	1	0
RAW_STATUS_39	RAW_STATUS_38	RAW_STATUS_37	RAW_STATUS_36	RAW_STATUS_35	RAW_STATUS_34	RAW_STATUS_33	RAW_STATUS_32
W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS
0h	0h	0h	0h	0h	0h	0h	0h

Table 4-530 ICSSM_PR1_ICSS_INTC_INTC_SLV_RAW_STATUS_REG1 Register Field Descriptions

Bit	Field	Type	Reset	Description
31	RAW_STATUS_63	W1TS	0h	Raw Status (write 1 to set) for intr_in[63]
30	RAW_STATUS_62	W1TS	0h	Raw Status (write 1 to set) for intr_in[62]
29	RAW_STATUS_61	W1TS	0h	Raw Status (write 1 to set) for intr_in[61]
28	RAW_STATUS_60	W1TS	0h	Raw Status (write 1 to set) for intr_in[60]
27	RAW_STATUS_59	W1TS	0h	Raw Status (write 1 to set) for intr_in[59]
26	RAW_STATUS_58	W1TS	0h	Raw Status (write 1 to set) for intr_in[58]
25	RAW_STATUS_57	W1TS	0h	Raw Status (write 1 to set) for intr_in[57]
24	RAW_STATUS_56	W1TS	0h	Raw Status (write 1 to set) for intr_in[56]
23	RAW_STATUS_55	W1TS	0h	Raw Status (write 1 to set) for intr_in[55]
22	RAW_STATUS_54	W1TS	0h	Raw Status (write 1 to set) for intr_in[54]
21	RAW_STATUS_53	W1TS	0h	Raw Status (write 1 to set) for intr_in[53]
20	RAW_STATUS_52	W1TS	0h	Raw Status (write 1 to set) for intr_in[52]
19	RAW_STATUS_51	W1TS	0h	Raw Status (write 1 to set) for intr_in[51]
18	RAW_STATUS_50	W1TS	0h	Raw Status (write 1 to set) for intr_in[50]
17	RAW_STATUS_49	W1TS	0h	Raw Status (write 1 to set) for intr_in[49]
16	RAW_STATUS_48	W1TS	0h	Raw Status (write 1 to set) for intr_in[48]
15	RAW_STATUS_47	W1TS	0h	Raw Status (write 1 to set) for intr_in[47]
14	RAW_STATUS_46	W1TS	0h	Raw Status (write 1 to set) for intr_in[46]
13	RAW_STATUS_45	W1TS	0h	Raw Status (write 1 to set) for intr_in[45]
12	RAW_STATUS_44	W1TS	0h	Raw Status (write 1 to set) for intr_in[44]
11	RAW_STATUS_43	W1TS	0h	Raw Status (write 1 to set) for intr_in[43]
10	RAW_STATUS_42	W1TS	0h	Raw Status (write 1 to set) for intr_in[42]
9	RAW_STATUS_41	W1TS	0h	Raw Status (write 1 to set) for intr_in[41]
8	RAW_STATUS_40	W1TS	0h	Raw Status (write 1 to set) for intr_in[40]
7	RAW_STATUS_39	W1TS	0h	Raw Status (write 1 to set) for intr_in[39]
6	RAW_STATUS_38	W1TS	0h	Raw Status (write 1 to set) for intr_in[38]
5	RAW_STATUS_37	W1TS	0h	Raw Status (write 1 to set) for intr_in[37]
4	RAW_STATUS_36	W1TS	0h	Raw Status (write 1 to set) for intr_in[36]
3	RAW_STATUS_35	W1TS	0h	Raw Status (write 1 to set) for intr_in[35]
2	RAW_STATUS_34	W1TS	0h	Raw Status (write 1 to set) for intr_in[34]
1	RAW_STATUS_33	W1TS	0h	Raw Status (write 1 to set) for intr_in[33]
0	RAW_STATUS_32	W1TS	0h	Raw Status (write 1 to set) for intr_in[32]