SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
This register is used to check the correctness of the system interconnect either internally to peripheral bus, or externally to device IO pads, when the module is configured in system test (SYSTEST) mode.
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| Instance Name | Physical Address |
|---|---|
| MCSPI0 | 5220 0124h |
| MCSPI1 | 5220 1124h |
| MCSPI2 | 5220 2124h |
| MCSPI3 | 5220 3124h |
| MCSPI4 | 5220 4124h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED_17 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED_17 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_17 | SSB | SPIENDIR | SPIDATDIR1 | SPIDATDIR0 | |||
| R | R/W | R/W | R/W | R/W | |||
| 0h | 0h | 0h | 0h | 0h | |||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| WAKD | SPICLK | SPIDAT_1 | SPIDAT_0 | SPIEN_3 | SPIEN_2 | SPIEN_1 | SPIEN_0 |
| R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
| 0h | 0h | 0h | 0h | 0h | 0h | 0h | 0h |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:12 | RESERVED_17 | R | 0h | Reads returns 0 |
| 11 | SSB | R/W | 0h | Set status bit 1 Force to 1 all status bits of
MCSPI_IRQSTATUS register. Writing 1 into
this bit sets to 1 all status bits in the
MCSPI_IRQSTATUS register.
0 No action. Writing 0 does not clear already
set status bits. This bit must be cleared
before trying to clear a status bit of the
MCSPI_IRQSTATUS register. |
| 10 | SPIENDIR | R/W | 0h | Set the direction of the SPIEN[3:0] lines and SPICLK line 1 Input (as in peripheral mode) 0 Output (as in controller mode) |
| 9 | SPIDATDIR1 | R/W | 0h | Set the direction of the SPIDAT[1] 1 Input 0 Output |
| 8 | SPIDATDIR0 | R/W | 0h | Set the direction of the SPIDAT[0] 1 Input 0 Output |
| 7 | WAKD | R/W | 0h | SWAKEUP output [signal data value of internal signal to system] The signal is driven high or low according to the value written into this register bit 1 The pin is driven high. 0 The pin is driven low. |
| 6 | SPICLK | R/W | 0h | SPICLK line [signal data value] If MCSPI_SYST[SPIENDIR] = 1 [input mode direction], this bit returns the value on the CLKSPI line [high or low], and a write into this bit has no effect If MCSPI_SYST[SPIENDIR] = 0 [output mode direction], the CLKSPI line is driven high or low according to the value written into this register |
| 5 | SPIDAT_1 | R/W | 0h | SPIDAT[1] line [signal data value] If MCSPI_SYST[SPIDATDIR1] = 0 [output mode direction], the SPIDAT[1] line is driven high or low according to the value written into this register If MCSPI_SYST[SPIDATDIR1] = 1 [input mode direction], this bit returns the value on the SPIDAT[1] line [high or low], and a write into this bit has no effect |
| 4 | SPIDAT_0 | R/W | 0h | SPIDAT[0] line [signal data value] If MCSPI_SYST[SPIDATDIR0] = 0 [output mode direction], the SPIDAT[0] line is driven high or low according to the value written into this register If MCSPI_SYST[SPIDATDIR0] = 1 [input mode direction], this bit returns the value on the SPIDAT[0] line [high or low], and a write into this bit has no effect |
| 3 | SPIEN_3 | R/W | 0h | SPIEN[3] line [signal data value] If MCSPI_SYST[SPIENDIR] = 0 [output mode direction], the SPIENT[3] line is driven high or low according to the value written into this register If MCSPI_SYST[SPIENDIR] = 1 [input mode direction], this bit returns the value on the SPIEN[3] line [high or low], and a write into this bit has no effect |
| 2 | SPIEN_2 | R/W | 0h | SPIEN[2] line [signal data value] If MCSPI_SYST[SPIENDIR] = 0 [output mode direction], the SPIENT[2] line is driven high or low according to the value written into this register If MCSPI_SYST[SPIENDIR] = 1 [input mode direction], this bit returns the value on the SPIEN[2] line [high or low], and a write into this bit has no effect |
| 1 | SPIEN_1 | R/W | 0h | SPIEN[1] line [signal data value] If MCSPI_SYST[SPIENDIR] = 0 [output mode direction], the SPIENT[1] line is driven high or low according to the value written into this register If MCSPI_SYST[SPIENDIR] = 1 [input mode direction], this bit returns the value on the SPIEN[1] line [high or low], and a write into this bit has no effect |
| 0 | SPIEN_0 | R/W | 0h | SPIEN[0] line [signal data value] If MCSPI_SYST[SPIENDIR] = 0 [output mode direction], the SPIENT[0] line is driven high or low according to the value written into this register If MCSPI_SYST[SPIENDIR] = 1 [input mode direction], this bit returns the value on the SPIEN[0] line [high or low], and a write into this bit has no effect |