SPRUJ42 User guide | 德州仪器 TI.com.cn

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

4.2.2.53 ICSSM_PR1_ICSS_INTC_INTC_SLV_RAW_STATUS_REG0 Register

2.2.53.1 ICSSM_PR1_ICSS_INTC_INTC_SLV_RAW_STATUS_REG0 Register (Offset = 200h) [reset = 0h]

Raw Status Register 0

Table 4-527 Instance Table

Instance Name	Physical Address
ICSSM0	4802 0200h

Figure 4-247 ICSSM_PR1_ICSS_INTC_INTC_SLV_RAW_STATUS_REG0 Name Register

31	30	29	28	27	26	25	24
RAW_STATUS_31	RAW_STATUS_30	RAW_STATUS_29	RAW_STATUS_28	RAW_STATUS_27	RAW_STATUS_26	RAW_STATUS_25	RAW_STATUS_24
W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS
0h	0h	0h	0h	0h	0h	0h	0h
23	22	21	20	19	18	17	16
RAW_STATUS_23	RAW_STATUS_22	RAW_STATUS_21	RAW_STATUS_20	RAW_STATUS_19	RAW_STATUS_18	RAW_STATUS_17	RAW_STATUS_16
W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS
0h	0h	0h	0h	0h	0h	0h	0h
15	14	13	12	11	10	9	8
RAW_STATUS_15	RAW_STATUS_14	RAW_STATUS_13	RAW_STATUS_12	RAW_STATUS_11	RAW_STATUS_10	RAW_STATUS_9	RAW_STATUS_8
W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS
0h	0h	0h	0h	0h	0h	0h	0h
7	6	5	4	3	2	1	0
RAW_STATUS_7	RAW_STATUS_6	RAW_STATUS_5	RAW_STATUS_4	RAW_STATUS_3	RAW_STATUS_2	RAW_STATUS_1	RAW_STATUS_0
W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS	W1TS
0h	0h	0h	0h	0h	0h	0h	0h

Table 4-528 ICSSM_PR1_ICSS_INTC_INTC_SLV_RAW_STATUS_REG0 Register Field Descriptions

Bit	Field	Type	Reset	Description
31	RAW_STATUS_31	W1TS	0h	Raw Status (write 1 to set) for intr_in[31]
30	RAW_STATUS_30	W1TS	0h	Raw Status (write 1 to set) for intr_in[30]
29	RAW_STATUS_29	W1TS	0h	Raw Status (write 1 to set) for intr_in[29]
28	RAW_STATUS_28	W1TS	0h	Raw Status (write 1 to set) for intr_in[28]
27	RAW_STATUS_27	W1TS	0h	Raw Status (write 1 to set) for intr_in[27]
26	RAW_STATUS_26	W1TS	0h	Raw Status (write 1 to set) for intr_in[26]
25	RAW_STATUS_25	W1TS	0h	Raw Status (write 1 to set) for intr_in[25]
24	RAW_STATUS_24	W1TS	0h	Raw Status (write 1 to set) for intr_in[24]
23	RAW_STATUS_23	W1TS	0h	Raw Status (write 1 to set) for intr_in[23]
22	RAW_STATUS_22	W1TS	0h	Raw Status (write 1 to set) for intr_in[22]
21	RAW_STATUS_21	W1TS	0h	Raw Status (write 1 to set) for intr_in[21]
20	RAW_STATUS_20	W1TS	0h	Raw Status (write 1 to set) for intr_in[20]
19	RAW_STATUS_19	W1TS	0h	Raw Status (write 1 to set) for intr_in[19]
18	RAW_STATUS_18	W1TS	0h	Raw Status (write 1 to set) for intr_in[18]
17	RAW_STATUS_17	W1TS	0h	Raw Status (write 1 to set) for intr_in[17]
16	RAW_STATUS_16	W1TS	0h	Raw Status (write 1 to set) for intr_in[16]
15	RAW_STATUS_15	W1TS	0h	Raw Status (write 1 to set) for intr_in[15]
14	RAW_STATUS_14	W1TS	0h	Raw Status (write 1 to set) for intr_in[14]
13	RAW_STATUS_13	W1TS	0h	Raw Status (write 1 to set) for intr_in[13]
12	RAW_STATUS_12	W1TS	0h	Raw Status (write 1 to set) for intr_in[12]
11	RAW_STATUS_11	W1TS	0h	Raw Status (write 1 to set) for intr_in[11]
10	RAW_STATUS_10	W1TS	0h	Raw Status (write 1 to set) for intr_in[10]
9	RAW_STATUS_9	W1TS	0h	Raw Status (write 1 to set) for intr_in[9]
8	RAW_STATUS_8	W1TS	0h	Raw Status (write 1 to set) for intr_in[8]
7	RAW_STATUS_7	W1TS	0h	Raw Status (write 1 to set) for intr_in[7]
6	RAW_STATUS_6	W1TS	0h	Raw Status (write 1 to set) for intr_in[6]
5	RAW_STATUS_5	W1TS	0h	Raw Status (write 1 to set) for intr_in[5]
4	RAW_STATUS_4	W1TS	0h	Raw Status (write 1 to set) for intr_in[4]
3	RAW_STATUS_3	W1TS	0h	Raw Status (write 1 to set) for intr_in[3]
2	RAW_STATUS_2	W1TS	0h	Raw Status (write 1 to set) for intr_in[2]
1	RAW_STATUS_1	W1TS	0h	Raw Status (write 1 to set) for intr_in[1]
0	RAW_STATUS_0	W1TS	0h	Raw Status (write 1 to set) for intr_in[0]