SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
The SCIINTVECT1 register indicates the offset for the INT1 interrupt line.
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| Instance Name | Physical Address |
|---|---|
| LIN0 | 5240 0024h |
| LIN1 | 5240 1024h |
| LIN2 | 5240 2024h |
| LIN3 | 5240 3024h |
| LIN4 | 5240 4024h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED_2 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED_2 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_1 | INTVECT1 | ||||||
| R | R | ||||||
| 0h | 0h | ||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:16 | RESERVED_2 | R | 0h | Reserved |
| 15:5 | RESERVED_1 | R | 0h | Reserved |
| 4:0 | INTVECT1 | R | 0h | Interrupt vector offset for INT1. This register indicates the offset for interrupt line INT1. A read to this register updates its value to the next highest priority pending interrupt in SCIFLR and clears the flag corresponding to the offset that was read. Note: The flags for the receive [SCIFLR.9] and the transmit [SCIFLR.8] interrupts cannot be cleared by Reading the corresponding offset vector in this register [see detailed description in SCIFLR register]. |