SPRUJ42 User guide | 德州仪器 TI.com.cn

SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1

PRODUCTION DATA

5.15.2.29 MMC_ADMAES Register

15.2.29.1 MMC_ADMAES Register (Offset = 254h) [reset = 0h]

ADMA Error Status Register

When ADMA Error Interrupt is occurred, the ADMA Error States field in this register holds the ADMA state and the ADMA System Address Register holds the address around the error descriptor. For recovering the error, the Host Driver requires the ADMA state to identify the error descriptor address as follows:
ST_STOP: Previous location set in the ADMA System Address register is the error descriptor address
ST_FDS: Current location set in the ADMA System Address register is the error descriptor address
ST_CADR: This sate is never set because do not generate ADMA error in this state.
ST_TFR: Previous location set in the ADMA System Address register is the error descriptor address
In case of write operation, the Host Driver should use ACMD22 to get the number of written block rather than using this information, since unwritten data may exist in the Host Controller. The Host Controller generates the ADMA Error Interrupt when it detects invalid descriptor data (Valid=0) at the ST_FDS state. In this case, ADMA Error State indicates that an error occurs at ST_FDS state. The Host Driver may find that the Valid bit is not set in the error descriptor.

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Table 5-1820 Instance Table

Instance Name	Physical Address
MMCSD0	4830 0254h

Figure 5-898 MMC_ADMAES Name Register

31	30	29	28	27	26	25	24
RESERVED
R
0h
23	22	21	20	19	18	17	16
RESERVED
R
0h
15	14	13	12	11	10	9	8
RESERVED
R
0h
7	6	5	4	3	2	1	0
RESERVED					LME	AES
R					R/W	R/W
0h					0h	0h

Table 5-1821 MMC_ADMAES Register Field Descriptions

Bit	Field	Type	Reset	Description
31:3	RESERVED	R	0h
2	LME	R/W	0h	ADMA Length Mismatch Error: [1] While Block Count Enable being set, the total data length specified by the Descriptor table is different from that specified by the Block Count and Block Length. [2] Total data length can not be divided by the block length. 1 Error 0 No Error
1:0	AES	R/W	0h	ADMA Error State his field indicates the state of ADMA when error is occurred during ADMA data transfer. This field never indicates "10" because ADMA never stops in this state. 3 ST_TFR (Transfer Data)Points the next of the error descriptor 2 Never set this state(Not used) 1 ST_STOP (Stop DMA)Points the error descriptor 0 ST_STOP (Stop DMA)Contents of SYS_SDR register