SPRUJ42E March 2022 – October 2024 AM2631 , AM2631-Q1 , AM2632 , AM2632-Q1 , AM2634 , AM2634-Q1
PRODUCTION DATA
The LIN_GLB_INT_CLR register is used to clear the interrupt flags in LIN_GLB_INT_FLG register.
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| Instance Name | Physical Address |
|---|---|
| LIN0 | 5240 00E8h |
| LIN1 | 5240 10E8h |
| LIN2 | 5240 20E8h |
| LIN3 | 5240 30E8h |
| LIN4 | 5240 40E8h |
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| RESERVED_1 | |||||||
| R | |||||||
| 0h | |||||||
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED_1 | INT1_FLG_CLR | INT0_FLG_CLR | |||||
| R | R/W1TC | R/W1TC | |||||
| 0h | 0h | 0h | |||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 31:2 | RESERVED_1 | R | 0h | Reserved |
| 1 | INT1_FLG_CLR | R/W1TC | 0h | Global Interrupt flag clear for LIN INT1. This bit is used to clear the corresponding bit in the LIN_GLB_INT_FLG register. Write 1 to clear the INT1_FLG bit. Writing 0 has no effect. |
| 0 | INT0_FLG_CLR | R/W1TC | 0h | Global Interrupt flag clear for LIN INT0. This bit is used to clear the corresponding bit in the LIN_GLB_INT_FLG register. Write 1 to clear the INT0_FLG bit. Writing 0 has no effect. |